From: Jan Beulich <jbeulich@suse.com>
To: Binutils <binutils@sourceware.org>
Cc: "H.J. Lu" <hjl.tools@gmail.com>, Lili Cui <lili.cui@intel.com>
Subject: [PATCH 2/2] x86/APX: TILE{RELEASE,ZERO} have no EVEX encodings
Date: Fri, 19 Jan 2024 12:25:54 +0100 [thread overview]
Message-ID: <f630b8f6-31bf-442b-8c14-f93cb8c0f9df@suse.com> (raw)
In-Reply-To: <86ed7622-73e5-469e-88fd-550dd2e7fca6@suse.com>
Re-using the entire VEX decode hierarchy for the respective major opcode
has led to those two also being decoded as-if valid. Follow the earlier
USE_X86_64_EVEX_{PFX,W}_TABLE approach to avoid this happening.
--- a/opcodes/i386-dis-evex.h
+++ b/opcodes/i386-dis-evex.h
@@ -375,9 +375,9 @@ static const struct dis386 evex_table[][
{ "vpsllv%DQ", { XM, Vex, EXx }, PREFIX_DATA },
/* 48 */
{ Bad_Opcode },
- { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F3849) },
+ { X86_64_EVEX_MEM_W_TABLE (VEX_W_0F3849_X86_64_L_0) },
{ Bad_Opcode },
- { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F384B) },
+ { X86_64_EVEX_MEM_W_TABLE (VEX_W_0F384B_X86_64_L_0) },
{ "vrcp14p%XW", { XM, EXx }, PREFIX_DATA },
{ "vrcp14s%XW", { XMScalar, VexScalar, EXdq }, PREFIX_DATA },
{ "vrsqrt14p%XW", { XM, EXx }, 0 },
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -823,6 +823,7 @@ enum
USE_X86_64_EVEX_FROM_VEX_TABLE,
USE_X86_64_EVEX_PFX_TABLE,
USE_X86_64_EVEX_W_TABLE,
+ USE_X86_64_EVEX_MEM_W_TABLE,
USE_3BYTE_TABLE,
USE_XOP_8F_TABLE,
USE_VEX_C4_TABLE,
@@ -845,6 +846,7 @@ enum
DIS386 (USE_X86_64_EVEX_FROM_VEX_TABLE, (I))
#define X86_64_EVEX_PFX_TABLE(I) DIS386 (USE_X86_64_EVEX_PFX_TABLE, (I))
#define X86_64_EVEX_W_TABLE(I) DIS386 (USE_X86_64_EVEX_W_TABLE, (I))
+#define X86_64_EVEX_MEM_W_TABLE(I) DIS386 (USE_X86_64_EVEX_MEM_W_TABLE, (I))
#define THREE_BYTE_TABLE(I) DIS386 (USE_3BYTE_TABLE, (I))
#define XOP_8F_TABLE() DIS386 (USE_XOP_8F_TABLE, 0)
#define VEX_C4_TABLE() DIS386 (USE_VEX_C4_TABLE, 0)
@@ -8802,6 +8804,7 @@ get_valid_dis386 (const struct dis386 *d
case USE_X86_64_EVEX_FROM_VEX_TABLE:
case USE_X86_64_EVEX_PFX_TABLE:
case USE_X86_64_EVEX_W_TABLE:
+ case USE_X86_64_EVEX_MEM_W_TABLE:
ins->evex_type = evex_from_vex;
/* EVEX from VEX instructions are 64-bit only and require that EVEX.z,
EVEX.L'L, EVEX.b, and the lower 2 bits of EVEX.aaa must be 0. */
@@ -8816,6 +8819,12 @@ get_valid_dis386 (const struct dis386 *d
goto use_prefix_table;
if (dp->op[0].bytemode == USE_X86_64_EVEX_W_TABLE)
goto use_vex_w_table;
+ if (dp->op[0].bytemode == USE_X86_64_EVEX_MEM_W_TABLE)
+ {
+ if (ins->modrm.mod == 3)
+ return &bad_opcode;
+ goto use_vex_w_table;
+ }
/* Fall through. */
case USE_X86_64_TABLE:
prev parent reply other threads:[~2024-01-19 11:25 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-19 11:24 [PATCH 0/2] x86/APX: disassembler adjustments Jan Beulich
2024-01-19 11:25 ` [PATCH 1/2] x86/APX: no need to have decode go through x86_64_table[] Jan Beulich
2024-01-19 11:25 ` Jan Beulich [this message]
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