From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [216.205.24.124]) by sourceware.org (Postfix) with ESMTP id 127103857C60 for ; Wed, 17 Feb 2021 10:56:42 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 127103857C60 Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-359-WFCf94cPPPerlNeBdVsuIA-1; Wed, 17 Feb 2021 05:56:38 -0500 X-MC-Unique: WFCf94cPPPerlNeBdVsuIA-1 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id C2C5E835E20; Wed, 17 Feb 2021 10:56:36 +0000 (UTC) Received: from [10.36.114.104] (ovpn-114-104.ams2.redhat.com [10.36.114.104]) by smtp.corp.redhat.com (Postfix) with ESMTPS id B09F96E519; Wed, 17 Feb 2021 10:56:35 +0000 (UTC) Subject: Re: [PATCH] RISC-V: Add bfd/cpu-riscv.h to support all spec versions controling. To: Nelson Chu , Binutils , Jim Wilson , Alan Modra , Kito Cheng References: <1611809168-2570-1-git-send-email-nelson.chu@sifive.com> From: Nick Clifton Organization: Red Hat Message-ID: Date: Wed, 17 Feb 2021 10:56:34 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.7.0 MIME-Version: 1.0 In-Reply-To: X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-GB Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-5.8 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, NICE_REPLY_A, RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 17 Feb 2021 10:56:43 -0000 Hi Nelson, >> bfd/ >> * Makefile.am: Added cpu-riscv.h. >> * Makefile.in: Regenerated. >> * doc/Makefile.in: Regenerated. >> * po/SRC-POTFILES.in: Regenerated. >> * cpu-riscv.h: Added to support spec versions controling. Also added >> extern arrays and functions for cpu-riscv.c. >> (enum riscv_spec_class): Define all spec classes here uniformly. >> (struct riscv_spec): Added for all specs. >> (RISCV_GET_SPEC_CLASS): Added to reduce repeated code. >> (RISCV_GET_SPEC_NAME): Likewise. >> (RISCV_GET_ISA_SPEC_CLASS): Added to get ISA spec class. >> (RISCV_GET_PRIV_SPEC_CLASS): Added to get privileged spec class. >> (RISCV_GET_PRIV_SPEC_NAME): Added to get privileged spec name. >> * cpu-riscv.c (struct priv_spec_t): Replaced with struct riscv_spec. >> (riscv_get_priv_spec_class): Replaced with RISCV_GET_PRIV_SPEC_CLASS. >> (riscv_get_priv_spec_name): Replaced with RISCV_GET_PRIV_SPEC_NAME. >> (riscv_priv_specs): Moved below. >> (riscv_get_priv_spec_class_from_numbers): Likewise, updated. >> (riscv_isa_specs): Moved from include/opcode/riscv.h. >> * elfnn-riscv.c: Included cpu-riscv.h. >> (riscv_merge_attributes): Initialize in_priv_spec and out_priv_spec. >> * elfxx-riscv.c: Included cpu-riscv.h and opcode/riscv.h. >> (RISCV_UNKNOWN_VERSION): Moved from include/opcode/riscv.h. >> * elfxx-riscv.h: Removed extern functions to cpu-riscv.h. >> gas/ >> * config/tc-riscv.c: Included cpu-riscv.h. >> (enum riscv_csr_clas): Moved from include/opcode/riscv.h. >> (struct riscv_csr_extra): Likewise. >> (struct riscv_ext_version): Likewise. >> (ext_version_table): Moved from opcodes/riscv-opc.c. >> (default_isa_spec): Updated type to riscv_spec_class. >> (default_priv_spec): Likewise. >> (riscv_set_default_isa_spec): Updated. >> (init_ext_version_hash): Likewise. >> (riscv_init_csr_hash): Likewise, also fixed indent. >> include/ >> * opcode/riscv.h: Moved stuff and make the file tidy. >> opcodes/ >> * riscv-dis.c: Included cpu-riscv.h, and removed elfxx-riscv.h. >> (default_priv_spec): Updated type to riscv_spec_class. >> (parse_riscv_dis_option): Updated. >> * riscv-opc.c: Moved stuff and make the file tidy. Patch approved - please apply. Cheers Nick