From 98364132a40467c272cf0def231ac765d0f645e7 Mon Sep 17 00:00:00 2001 From: Saurabh Jha Date: Thu, 29 Feb 2024 14:09:17 +0000 Subject: [PATCH] gas, aarch64: Add faminmax extension This patch introduces instructions for the faminmax extension for AArch64. They are documented here: * famax SIMD: https://developer.arm.com/documentation/ddi0602/2023-12/SIMD-FP-Instructions/FAMAX--Floating-point-absolute-maximum-?lang=en * famax SVE2: https://developer.arm.com/documentation/ddi0602/2023-12/SVE-Instructions/FAMAX--Floating-point-absolute-maximum--predicated--?lang=en * famax SME2: https://developer.arm.com/documentation/ddi0602/2023-12/SME-Instructions/FAMAX--Multi-vector-floating-point-absolute-maximum-?lang=en * famin SIMD: https://developer.arm.com/documentation/ddi0602/2023-12/SIMD-FP-Instructions/FAMIN--Floating-point-absolute-minimum-?lang=en * famin SVE2: https://developer.arm.com/documentation/ddi0602/2023-12/SVE-Instructions/FAMIN--Floating-point-absolute-minimum--predicated--?lang=en * famin SME2: https://developer.arm.com/documentation/ddi0602/2023-12/SME-Instructions/FAMIN--Multi-vector-floating-point-absolute-minimum-?lang=en --- gas/config/tc-aarch64.c | 1 + .../gas/aarch64/advsimd-faminmax-bad.d | 3 + .../gas/aarch64/advsimd-faminmax-bad.l | 51 ++++++++ .../gas/aarch64/advsimd-faminmax-illegal.d | 3 + .../gas/aarch64/advsimd-faminmax-illegal.l | 87 +++++++++++++ .../gas/aarch64/advsimd-faminmax-illegal.s | 51 ++++++++ gas/testsuite/gas/aarch64/advsimd-faminmax.d | 60 +++++++++ gas/testsuite/gas/aarch64/advsimd-faminmax.s | 67 ++++++++++ gas/testsuite/gas/aarch64/sme2-faminmax-bad.d | 3 + gas/testsuite/gas/aarch64/sme2-faminmax-bad.l | 49 +++++++ .../gas/aarch64/sme2-faminmax-illegal.d | 3 + .../gas/aarch64/sme2-faminmax-illegal.l | 87 +++++++++++++ .../gas/aarch64/sme2-faminmax-illegal.s | 63 +++++++++ gas/testsuite/gas/aarch64/sme2-faminmax.d | 58 +++++++++ gas/testsuite/gas/aarch64/sme2-faminmax.s | 67 ++++++++++ gas/testsuite/gas/aarch64/sve2-faminmax-bad.d | 3 + gas/testsuite/gas/aarch64/sve2-faminmax-bad.l | 81 ++++++++++++ .../gas/aarch64/sve2-faminmax-illegal.d | 3 + .../gas/aarch64/sve2-faminmax-illegal.l | 123 ++++++++++++++++++ .../gas/aarch64/sve2-faminmax-illegal.s | 71 ++++++++++ .../gas/aarch64/sve2-faminmax-warning.s | 0 gas/testsuite/gas/aarch64/sve2-faminmax.d | 90 +++++++++++++ gas/testsuite/gas/aarch64/sve2-faminmax.s | 95 ++++++++++++++ include/opcode/aarch64.h | 2 + opcodes/aarch64-tbl.h | 30 +++++ 25 files changed, 1151 insertions(+) create mode 100644 gas/testsuite/gas/aarch64/advsimd-faminmax-bad.d create mode 100644 gas/testsuite/gas/aarch64/advsimd-faminmax-bad.l create mode 100644 gas/testsuite/gas/aarch64/advsimd-faminmax-illegal.d create mode 100644 gas/testsuite/gas/aarch64/advsimd-faminmax-illegal.l create mode 100644 gas/testsuite/gas/aarch64/advsimd-faminmax-illegal.s create mode 100644 gas/testsuite/gas/aarch64/advsimd-faminmax.d create mode 100644 gas/testsuite/gas/aarch64/advsimd-faminmax.s create mode 100644 gas/testsuite/gas/aarch64/sme2-faminmax-bad.d create mode 100644 gas/testsuite/gas/aarch64/sme2-faminmax-bad.l create mode 100644 gas/testsuite/gas/aarch64/sme2-faminmax-illegal.d create mode 100644 gas/testsuite/gas/aarch64/sme2-faminmax-illegal.l create mode 100644 gas/testsuite/gas/aarch64/sme2-faminmax-illegal.s create mode 100644 gas/testsuite/gas/aarch64/sme2-faminmax.d create mode 100644 gas/testsuite/gas/aarch64/sme2-faminmax.s create mode 100644 gas/testsuite/gas/aarch64/sve2-faminmax-bad.d create mode 100644 gas/testsuite/gas/aarch64/sve2-faminmax-bad.l create mode 100644 gas/testsuite/gas/aarch64/sve2-faminmax-illegal.d create mode 100644 gas/testsuite/gas/aarch64/sve2-faminmax-illegal.l create mode 100644 gas/testsuite/gas/aarch64/sve2-faminmax-illegal.s create mode 100644 gas/testsuite/gas/aarch64/sve2-faminmax-warning.s create mode 100644 gas/testsuite/gas/aarch64/sve2-faminmax.d create mode 100644 gas/testsuite/gas/aarch64/sve2-faminmax.s diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index 0c6de289408..b4b9ebef166 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -10429,6 +10429,7 @@ static const struct aarch64_option_cpu_value_table aarch64_features[] = { {"sme2p1", AARCH64_FEATURE (SME2p1), AARCH64_FEATURE (SME2)}, {"sve2p1", AARCH64_FEATURE (SVE2p1), AARCH64_FEATURE (SVE2)}, {"rcpc3", AARCH64_FEATURE (RCPC3), AARCH64_FEATURE (RCPC2)}, + {"faminmax", AARCH64_FEATURE (FAMINMAX), AARCH64_FEATURE (SIMD)}, {NULL, AARCH64_NO_FEATURES, AARCH64_NO_FEATURES}, }; diff --git a/gas/testsuite/gas/aarch64/advsimd-faminmax-bad.d b/gas/testsuite/gas/aarch64/advsimd-faminmax-bad.d new file mode 100644 index 00000000000..fcf64e09012 --- /dev/null +++ b/gas/testsuite/gas/aarch64/advsimd-faminmax-bad.d @@ -0,0 +1,3 @@ +#as: +#source: advsimd-faminmax.s +#error_output: advsimd-faminmax-bad.l \ No newline at end of file diff --git a/gas/testsuite/gas/aarch64/advsimd-faminmax-bad.l b/gas/testsuite/gas/aarch64/advsimd-faminmax-bad.l new file mode 100644 index 00000000000..9492c67c459 --- /dev/null +++ b/gas/testsuite/gas/aarch64/advsimd-faminmax-bad.l @@ -0,0 +1,51 @@ +[^ :]+: Assembler messages: +.*: Error: selected processor does not support `famax v0.4h,v0.4h,v0.4h' +.*: Error: selected processor does not support `famax v31.4h,v0.4h,v0.4h' +.*: Error: selected processor does not support `famax v0.4h,v31.4h,v0.4h' +.*: Error: selected processor does not support `famax v0.4h,v0.4h,v31.4h' +.*: Error: selected processor does not support `famax v17.4h,v21.4h,v27.4h' +.*: Error: selected processor does not support `famax v0.8h,v0.8h,v0.8h' +.*: Error: selected processor does not support `famax v31.8h,v0.8h,v0.8h' +.*: Error: selected processor does not support `famax v0.8h,v31.8h,v0.8h' +.*: Error: selected processor does not support `famax v0.8h,v0.8h,v31.8h' +.*: Error: selected processor does not support `famax v2.8h,v7.8h,v4.8h' +.*: Error: selected processor does not support `famax v0.2s,v0.2s,v0.2s' +.*: Error: selected processor does not support `famax v31.2s,v0.2s,v0.2s' +.*: Error: selected processor does not support `famax v0.2s,v31.2s,v0.2s' +.*: Error: selected processor does not support `famax v0.2s,v0.2s,v31.2s' +.*: Error: selected processor does not support `famax v3.2s,v1.2s,v19.2s' +.*: Error: selected processor does not support `famax v0.4s,v0.4s,v0.4s' +.*: Error: selected processor does not support `famax v31.4s,v0.4s,v0.4s' +.*: Error: selected processor does not support `famax v0.4s,v31.4s,v0.4s' +.*: Error: selected processor does not support `famax v0.4s,v0.4s,v31.4s' +.*: Error: selected processor does not support `famax v9.4s,v8.4s,v7.4s' +.*: Error: selected processor does not support `famax v0.2d,v0.2d,v0.2d' +.*: Error: selected processor does not support `famax v31.2d,v0.2d,v0.2d' +.*: Error: selected processor does not support `famax v0.2d,v31.2d,v0.2d' +.*: Error: selected processor does not support `famax v0.2d,v0.2d,v31.2d' +.*: Error: selected processor does not support `famax v18.2d,v14.2d,v16.2d' +.*: Error: selected processor does not support `famin v0.4h,v0.4h,v0.4h' +.*: Error: selected processor does not support `famin v31.4h,v0.4h,v0.4h' +.*: Error: selected processor does not support `famin v0.4h,v31.4h,v0.4h' +.*: Error: selected processor does not support `famin v0.4h,v0.4h,v31.4h' +.*: Error: selected processor does not support `famin v17.4h,v21.4h,v27.4h' +.*: Error: selected processor does not support `famin v0.8h,v0.8h,v0.8h' +.*: Error: selected processor does not support `famin v31.8h,v0.8h,v0.8h' +.*: Error: selected processor does not support `famin v0.8h,v31.8h,v0.8h' +.*: Error: selected processor does not support `famin v0.8h,v0.8h,v31.8h' +.*: Error: selected processor does not support `famin v2.8h,v7.8h,v4.8h' +.*: Error: selected processor does not support `famin v0.2s,v0.2s,v0.2s' +.*: Error: selected processor does not support `famin v31.2s,v0.2s,v0.2s' +.*: Error: selected processor does not support `famin v0.2s,v31.2s,v0.2s' +.*: Error: selected processor does not support `famin v0.2s,v0.2s,v31.2s' +.*: Error: selected processor does not support `famin v3.2s,v1.2s,v19.2s' +.*: Error: selected processor does not support `famin v0.4s,v0.4s,v0.4s' +.*: Error: selected processor does not support `famin v31.4s,v0.4s,v0.4s' +.*: Error: selected processor does not support `famin v0.4s,v31.4s,v0.4s' +.*: Error: selected processor does not support `famin v0.4s,v0.4s,v31.4s' +.*: Error: selected processor does not support `famin v9.4s,v8.4s,v7.4s' +.*: Error: selected processor does not support `famin v0.2d,v0.2d,v0.2d' +.*: Error: selected processor does not support `famin v31.2d,v0.2d,v0.2d' +.*: Error: selected processor does not support `famin v0.2d,v31.2d,v0.2d' +.*: Error: selected processor does not support `famin v0.2d,v0.2d,v31.2d' +.*: Error: selected processor does not support `famin v18.2d,v14.2d,v16.2d' diff --git a/gas/testsuite/gas/aarch64/advsimd-faminmax-illegal.d b/gas/testsuite/gas/aarch64/advsimd-faminmax-illegal.d new file mode 100644 index 00000000000..8cce8fe1897 --- /dev/null +++ b/gas/testsuite/gas/aarch64/advsimd-faminmax-illegal.d @@ -0,0 +1,3 @@ +#as: -march=armv8-a+faminmax +#source: advsimd-faminmax-illegal.s +#error_output: advsimd-faminmax-illegal.l \ No newline at end of file diff --git a/gas/testsuite/gas/aarch64/advsimd-faminmax-illegal.l b/gas/testsuite/gas/aarch64/advsimd-faminmax-illegal.l new file mode 100644 index 00000000000..29340d6f56c --- /dev/null +++ b/gas/testsuite/gas/aarch64/advsimd-faminmax-illegal.l @@ -0,0 +1,87 @@ +[^ :]+: Assembler messages: +[^ :]+:[0-9]+: Error: operand mismatch -- `famax v0.4s,v1.4h,v2.4h' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: famax v0\.4h, v1\.4h, v2\.4h +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: famax v0\.8h, v1\.8h, v2\.8h +[^ :]+:[0-9]+: Error: operand mismatch -- `famax v31.8h,v30.8h,v29.2s' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: famax v31\.8h, v30\.8h, v29\.8h +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: famax v31\.4h, v30\.4h, v29\.4h +[^ :]+:[0-9]+: Error: operand mismatch -- `famax v15.2s,v16.2d,v17.2s' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: famax v15\.2s, v16\.2s, v17\.2s +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: famax v15\.4s, v16\.4s, v17\.4s +[^ :]+:[0-9]+: Info: famax v15\.2d, v16\.2d, v17\.2d +[^ :]+:[0-9]+: Error: operand mismatch -- `famin v0.4s,v1.4h,v2.4h' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: famin v0\.4h, v1\.4h, v2\.4h +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: famin v0\.8h, v1\.8h, v2\.8h +[^ :]+:[0-9]+: Error: operand mismatch -- `famin v31.8h,v30.8h,v29.2s' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: famin v31\.8h, v30\.8h, v29\.8h +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: famin v31\.4h, v30\.4h, v29\.4h +[^ :]+:[0-9]+: Error: operand mismatch -- `famin v15.2s,v16.2d,v17.2s' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: famin v15\.2s, v16\.2s, v17\.2s +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: famin v15\.4s, v16\.4s, v17\.4s +[^ :]+:[0-9]+: Info: famin v15\.2d, v16\.2d, v17\.2d +[^ :]+:[0-9]+: Error: operand mismatch -- `famax v0\.8b,v1\.4b,v2\.4b' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: famax v0\.2s, v1\.2s, v2\.2s +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: famax v0\.4s, v1\.4s, v2\.4s +[^ :]+:[0-9]+: Info: famax v0\.2d, v1\.2d, v2\.2d +[^ :]+:[0-9]+: Error: operand mismatch -- `famax v10\.16b,v9\.16b,v8\.16b' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: famax v10\.2s, v9\.2s, v8\.2s +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: famax v10\.4s, v9\.4s, v8\.4s +[^ :]+:[0-9]+: Info: famax v10\.2d, v9\.2d, v8\.2d +[^ :]+:[0-9]+: Error: operand mismatch -- `famin v0\.8b,v1\.4b,v2\.4b' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: famin v0\.2s, v1\.2s, v2\.2s +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: famin v0\.4s, v1\.4s, v2\.4s +[^ :]+:[0-9]+: Info: famin v0\.2d, v1\.2d, v2\.2d +[^ :]+:[0-9]+: Error: operand mismatch -- `famin v10\.16b,v9\.16b,v8\.16b' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: famin v10\.2s, v9\.2s, v8\.2s +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: famin v10\.4s, v9\.4s, v8\.4s +[^ :]+:[0-9]+: Info: famin v10\.2d, v9\.2d, v8\.2d +[^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `famax v0.4h' +[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `famax v0.4h,v1.4h' +[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `famax v0.4h,v1.4h,v2.4h,v3.4h' +[^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `famin v0.4h' +[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `famin v0.4h,v1.4h' +[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `famin v0.4h,v1.4h,v2.4h,v3.4h' +[^ :]+:[0-9]+: Error: unexpected character `x' in element size at operand 3 -- `famax v0.4h,v1.4h,v2.4x' +[^ :]+:[0-9]+: Error: unexpected character `a' in element size at operand 2 -- `famax v0.2h,v2.2a,v1.2h' +[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `famax v2.2t,v0.2d,v1.2d' +[^ :]+:[0-9]+: Error: unexpected character `x' in element size at operand 3 -- `famin v0.4h,v1.4h,v2.4x' +[^ :]+:[0-9]+: Error: unexpected character `a' in element size at operand 2 -- `famin v0.2h,v2.2a,v1.2h' +[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `famin v2.2t,v0.2d,v1.2d' +[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `famax v19.2d,20.2d,v21.2d' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `famax 19.4d,v20.4d,v21.4d' +[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 3 -- `famax v19.2s,v20.2s,21.2s' +[^ :]+:[0-9]+: Error: invalid use of vector register at operand 1 -- `famax v19,v20.2d,v21.2d' +[^ :]+:[0-9]+: Error: invalid use of vector register at operand 2 -- `famax v19.2d,v20,v21.2d' +[^ :]+:[0-9]+: Error: invalid use of vector register at operand 3 -- `famax v19.2d,v20.2d,v21' +[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `famin v19.2d,20.2d,v21.2d' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `famin 19.4d,v20.4d,v21.4d' +[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 3 -- `famin v19.2s,v20.2s,21.2s' +[^ :]+:[0-9]+: Error: invalid use of vector register at operand 1 -- `famin v19,v20.2d,v21.2d' +[^ :]+:[0-9]+: Error: invalid use of vector register at operand 2 -- `famin v19.2d,v20,v21.2d' +[^ :]+:[0-9]+: Error: invalid use of vector register at operand 3 -- `famin v19.2d,v20.2d,v21' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `famax v35.4d,v30.4d,v29.4d' +[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `famax v30.2s,v35.2s,v29.2s' +[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 3 -- `famax v30.4s,v29.4s,v35.4s' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `famin v35.4d,v30.4d,v29.4d' +[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `famin v30.2s,v35.2s,v29.2s' +[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 3 -- `famin v30.4s,v29.4s,v35.4s' diff --git a/gas/testsuite/gas/aarch64/advsimd-faminmax-illegal.s b/gas/testsuite/gas/aarch64/advsimd-faminmax-illegal.s new file mode 100644 index 00000000000..c52a469bda5 --- /dev/null +++ b/gas/testsuite/gas/aarch64/advsimd-faminmax-illegal.s @@ -0,0 +1,51 @@ +// Operand mismatch +famax v0.4s, v1.4h, v2.4h +famax v31.8h, v30.8h, v29.2s +famax v15.2s, v16.2d, v17.2s +famin v0.4s, v1.4h, v2.4h +famin v31.8h, v30.8h, v29.2s +famin v15.2s, v16.2d, v17.2s + +// Disallowed types +famax v0.8b, v1.4b, v2.4b +famax v10.16b, v9.16b, v8.16b +famin v0.8b, v1.4b, v2.4b +famin v10.16b, v9.16b, v8.16b + +// Incorrect number of arguments +famax v0.4h +famax v0.4h, v1.4h +famax v0.4h, v1.4h, v2.4h, v3.4h +famin v0.4h +famin v0.4h, v1.4h +famin v0.4h, v1.4h, v2.4h, v3.4h + +// Spelling mistakes +famax v0.4h, v1.4h, v2.4x +famax v0.2h, v2.2a, v1.2h +famax v2.2t, v0.2d, v1.2d +famin v0.4h, v1.4h, v2.4x +famin v0.2h, v2.2a, v1.2h +famin v2.2t, v0.2d, v1.2d + +// Missing qualifiers +famax v19.2d, 20.2d, v21.2d +famax 19.4d, v20.4d, v21.4d +famax v19.2s, v20.2s, 21.2s +famax v19, v20.2d, v21.2d +famax v19.2d, v20, v21.2d +famax v19.2d, v20.2d, v21 +famin v19.2d, 20.2d, v21.2d +famin 19.4d, v20.4d, v21.4d +famin v19.2s, v20.2s, 21.2s +famin v19, v20.2d, v21.2d +famin v19.2d, v20, v21.2d +famin v19.2d, v20.2d, v21 + +// Out of range numbers +famax v35.4d, v30.4d, v29.4d +famax v30.2s, v35.2s, v29.2s +famax v30.4s, v29.4s, v35.4s +famin v35.4d, v30.4d, v29.4d +famin v30.2s, v35.2s, v29.2s +famin v30.4s, v29.4s, v35.4s diff --git a/gas/testsuite/gas/aarch64/advsimd-faminmax.d b/gas/testsuite/gas/aarch64/advsimd-faminmax.d new file mode 100644 index 00000000000..7be96b5ef25 --- /dev/null +++ b/gas/testsuite/gas/aarch64/advsimd-faminmax.d @@ -0,0 +1,60 @@ +#objdump: -dr +#as: -march=armv8-a+faminmax + +.*: file format .* + +Disassembly of section \.text: + +0+ <.*>: + 0: 0ec01c00 famax v0.4h, v0.4h, v0.4h + 4: 0ec01c1f famax v31.4h, v0.4h, v0.4h + 8: 0ec01fe0 famax v0.4h, v31.4h, v0.4h + c: 0edf1c00 famax v0.4h, v0.4h, v31.4h + 10: 0edb1eb1 famax v17.4h, v21.4h, v27.4h + 14: 4ec01c00 famax v0.8h, v0.8h, v0.8h + 18: 4ec01c1f famax v31.8h, v0.8h, v0.8h + 1c: 4ec01fe0 famax v0.8h, v31.8h, v0.8h + 20: 4edf1c00 famax v0.8h, v0.8h, v31.8h + 24: 4ec41ce2 famax v2.8h, v7.8h, v4.8h + 28: 0ea0dc00 famax v0.2s, v0.2s, v0.2s + 2c: 0ea0dc1f famax v31.2s, v0.2s, v0.2s + 30: 0ea0dfe0 famax v0.2s, v31.2s, v0.2s + 34: 0ebfdc00 famax v0.2s, v0.2s, v31.2s + 38: 0eb3dc23 famax v3.2s, v1.2s, v19.2s + 3c: 4ea0dc00 famax v0.4s, v0.4s, v0.4s + 40: 4ea0dc1f famax v31.4s, v0.4s, v0.4s + 44: 4ea0dfe0 famax v0.4s, v31.4s, v0.4s + 48: 4ebfdc00 famax v0.4s, v0.4s, v31.4s + 4c: 4ea7dd09 famax v9.4s, v8.4s, v7.4s + 50: 4ee0dc00 famax v0.2d, v0.2d, v0.2d + 54: 4ee0dc1f famax v31.2d, v0.2d, v0.2d + 58: 4ee0dfe0 famax v0.2d, v31.2d, v0.2d + 5c: 4effdc00 famax v0.2d, v0.2d, v31.2d + 60: 4ef0ddd2 famax v18.2d, v14.2d, v16.2d + 64: 0ef3dc23 .inst 0x0ef3dc23 ; undefined + 68: 2ec01c00 famin v0.4h, v0.4h, v0.4h + 6c: 2ec01c1f famin v31.4h, v0.4h, v0.4h + 70: 2ec01fe0 famin v0.4h, v31.4h, v0.4h + 74: 2edf1c00 famin v0.4h, v0.4h, v31.4h + 78: 2edb1eb1 famin v17.4h, v21.4h, v27.4h + 7c: 6ec01c00 famin v0.8h, v0.8h, v0.8h + 80: 6ec01c1f famin v31.8h, v0.8h, v0.8h + 84: 6ec01fe0 famin v0.8h, v31.8h, v0.8h + 88: 6edf1c00 famin v0.8h, v0.8h, v31.8h + 8c: 6ec41ce2 famin v2.8h, v7.8h, v4.8h + 90: 2ea0dc00 famin v0.2s, v0.2s, v0.2s + 94: 2ea0dc1f famin v31.2s, v0.2s, v0.2s + 98: 2ea0dfe0 famin v0.2s, v31.2s, v0.2s + 9c: 2ebfdc00 famin v0.2s, v0.2s, v31.2s + a0: 2eb3dc23 famin v3.2s, v1.2s, v19.2s + a4: 6ea0dc00 famin v0.4s, v0.4s, v0.4s + a8: 6ea0dc1f famin v31.4s, v0.4s, v0.4s + ac: 6ea0dfe0 famin v0.4s, v31.4s, v0.4s + b0: 6ebfdc00 famin v0.4s, v0.4s, v31.4s + b4: 6ea7dd09 famin v9.4s, v8.4s, v7.4s + b8: 6ee0dc00 famin v0.2d, v0.2d, v0.2d + bc: 6ee0dc1f famin v31.2d, v0.2d, v0.2d + c0: 6ee0dfe0 famin v0.2d, v31.2d, v0.2d + c4: 6effdc00 famin v0.2d, v0.2d, v31.2d + c8: 6ef0ddd2 famin v18.2d, v14.2d, v16.2d + cc: 2ef3dc23 .inst 0x2ef3dc23 ; undefined \ No newline at end of file diff --git a/gas/testsuite/gas/aarch64/advsimd-faminmax.s b/gas/testsuite/gas/aarch64/advsimd-faminmax.s new file mode 100644 index 00000000000..91bc9b54d4c --- /dev/null +++ b/gas/testsuite/gas/aarch64/advsimd-faminmax.s @@ -0,0 +1,67 @@ +// Valid instructions +famax v0.4h, v0.4h, v0.4h +famax v31.4h, v0.4h, v0.4h +famax v0.4h, v31.4h, v0.4h +famax v0.4h, v0.4h, v31.4h +famax v17.4h, v21.4h, v27.4h + +famax v0.8h, v0.8h, v0.8h +famax v31.8h, v0.8h, v0.8h +famax v0.8h, v31.8h, v0.8h +famax v0.8h, v0.8h, v31.8h +famax v2.8h, v7.8h, v4.8h + +famax v0.2s, v0.2s, v0.2s +famax v31.2s, v0.2s, v0.2s +famax v0.2s, v31.2s, v0.2s +famax v0.2s, v0.2s, v31.2s +famax v3.2s, v1.2s, v19.2s + +famax v0.4s, v0.4s, v0.4s +famax v31.4s, v0.4s, v0.4s +famax v0.4s, v31.4s, v0.4s +famax v0.4s, v0.4s, v31.4s +famax v9.4s, v8.4s, v7.4s + +famax v0.2d, v0.2d, v0.2d +famax v31.2d, v0.2d, v0.2d +famax v0.2d, v31.2d, v0.2d +famax v0.2d, v0.2d, v31.2d +famax v18.2d, v14.2d, v16.2d + +// Invalid instruction because Q = 0 and sz = 1 which is reserved +.inst 0xef3dc23 + +// Valid instructions +famin v0.4h, v0.4h, v0.4h +famin v31.4h, v0.4h, v0.4h +famin v0.4h, v31.4h, v0.4h +famin v0.4h, v0.4h, v31.4h +famin v17.4h, v21.4h, v27.4h + +famin v0.8h, v0.8h, v0.8h +famin v31.8h, v0.8h, v0.8h +famin v0.8h, v31.8h, v0.8h +famin v0.8h, v0.8h, v31.8h +famin v2.8h, v7.8h, v4.8h + +famin v0.2s, v0.2s, v0.2s +famin v31.2s, v0.2s, v0.2s +famin v0.2s, v31.2s, v0.2s +famin v0.2s, v0.2s, v31.2s +famin v3.2s, v1.2s, v19.2s + +famin v0.4s, v0.4s, v0.4s +famin v31.4s, v0.4s, v0.4s +famin v0.4s, v31.4s, v0.4s +famin v0.4s, v0.4s, v31.4s +famin v9.4s, v8.4s, v7.4s + +famin v0.2d, v0.2d, v0.2d +famin v31.2d, v0.2d, v0.2d +famin v0.2d, v31.2d, v0.2d +famin v0.2d, v0.2d, v31.2d +famin v18.2d, v14.2d, v16.2d + +// Invalid instruction because Q = 0 and sz = 1 which is reserved +.inst 0x2ef3dc23 diff --git a/gas/testsuite/gas/aarch64/sme2-faminmax-bad.d b/gas/testsuite/gas/aarch64/sme2-faminmax-bad.d new file mode 100644 index 00000000000..dac2d4766e3 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-faminmax-bad.d @@ -0,0 +1,3 @@ +#as: -march=armv8-a+faminmax +#source: sme2-faminmax.s +#error_output: sme2-faminmax-bad.l \ No newline at end of file diff --git a/gas/testsuite/gas/aarch64/sme2-faminmax-bad.l b/gas/testsuite/gas/aarch64/sme2-faminmax-bad.l new file mode 100644 index 00000000000..513b430f7a6 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-faminmax-bad.l @@ -0,0 +1,49 @@ +[^ :]+: Assembler messages: +.*: Error: selected processor does not support `famax {z0.h-z1.h},{z0.h-z1.h},{z0.h-z1.h}' +.*: Error: selected processor does not support `famax {z30.h-z31.h},{z30.h-z31.h},{z0.h-z1.h}' +.*: Error: selected processor does not support `famax {z0.h-z1.h},{z0.h-z1.h},{z30.h-z31.h}' +.*: Error: selected processor does not support `famax {z18.h-z19.h},{z18.h-z19.h},{z26.h-z27.h}' +.*: Error: selected processor does not support `famax {z0.s-z1.s},{z0.s-z1.s},{z0.s-z1.s}' +.*: Error: selected processor does not support `famax {z30.s-z31.s},{z30.s-z31.s},{z0.s-z1.s}' +.*: Error: selected processor does not support `famax {z0.s-z1.s},{z0.s-z1.s},{z30.s-z31.s}' +.*: Error: selected processor does not support `famax {z4.s-z5.s},{z4.s-z5.s},{z10.s-z11.s}' +.*: Error: selected processor does not support `famax {z0.d-z1.d},{z0.d-z1.d},{z0.d-z1.d}' +.*: Error: selected processor does not support `famax {z30.d-z31.d},{z30.d-z31.d},{z0.d-z1.d}' +.*: Error: selected processor does not support `famax {z0.d-z1.d},{z0.d-z1.d},{z30.d-z31.d}' +.*: Error: selected processor does not support `famax {z28.d-z29.d},{z28.d-z29.d},{z8.d-z9.d}' +.*: Error: selected processor does not support `famax {z0.h-z3.h},{z0.h-z3.h},{z0.h-z3.h}' +.*: Error: selected processor does not support `famax {z28.h-z31.h},{z28.h-z31.h},{z0.h-z3.h}' +.*: Error: selected processor does not support `famax {z0.h-z3.h},{z0.h-z3.h},{z28.h-z31.h}' +.*: Error: selected processor does not support `famax {z16.h-z19.h},{z16.h-z19.h},{z20.h-z23.h}' +.*: Error: selected processor does not support `famax {z0.s-z3.s},{z0.s-z3.s},{z0.s-z3.s}' +.*: Error: selected processor does not support `famax {z28.s-z31.s},{z28.s-z31.s},{z0.s-z3.s}' +.*: Error: selected processor does not support `famax {z0.s-z3.s},{z0.s-z3.s},{z28.s-z31.s}' +.*: Error: selected processor does not support `famax {z24.s-z27.s},{z24.s-z27.s},{z4.s-z7.s}' +.*: Error: selected processor does not support `famax {z0.d-z3.d},{z0.d-z3.d},{z0.d-z3.d}' +.*: Error: selected processor does not support `famax {z28.d-z31.d},{z28.d-z31.d},{z0.d-z3.d}' +.*: Error: selected processor does not support `famax {z0.d-z3.d},{z0.d-z3.d},{z28.d-z31.d}' +.*: Error: selected processor does not support `famax {z12.d-z15.d},{z12.d-z15.d},{z8.d-z11.d}' +.*: Error: selected processor does not support `famin {z0.h-z1.h},{z0.h-z1.h},{z0.h-z1.h}' +.*: Error: selected processor does not support `famin {z30.h-z31.h},{z30.h-z31.h},{z0.h-z1.h}' +.*: Error: selected processor does not support `famin {z0.h-z1.h},{z0.h-z1.h},{z30.h-z31.h}' +.*: Error: selected processor does not support `famin {z18.h-z19.h},{z18.h-z19.h},{z26.h-z27.h}' +.*: Error: selected processor does not support `famin {z0.s-z1.s},{z0.s-z1.s},{z0.s-z1.s}' +.*: Error: selected processor does not support `famin {z30.s-z31.s},{z30.s-z31.s},{z0.s-z1.s}' +.*: Error: selected processor does not support `famin {z0.s-z1.s},{z0.s-z1.s},{z30.s-z31.s}' +.*: Error: selected processor does not support `famin {z4.s-z5.s},{z4.s-z5.s},{z10.s-z11.s}' +.*: Error: selected processor does not support `famin {z0.d-z1.d},{z0.d-z1.d},{z0.d-z1.d}' +.*: Error: selected processor does not support `famin {z30.d-z31.d},{z30.d-z31.d},{z0.d-z1.d}' +.*: Error: selected processor does not support `famin {z0.d-z1.d},{z0.d-z1.d},{z30.d-z31.d}' +.*: Error: selected processor does not support `famin {z28.d-z29.d},{z28.d-z29.d},{z8.d-z9.d}' +.*: Error: selected processor does not support `famin {z0.h-z3.h},{z0.h-z3.h},{z0.h-z3.h}' +.*: Error: selected processor does not support `famin {z28.h-z31.h},{z28.h-z31.h},{z0.h-z3.h}' +.*: Error: selected processor does not support `famin {z0.h-z3.h},{z0.h-z3.h},{z28.h-z31.h}' +.*: Error: selected processor does not support `famin {z16.h-z19.h},{z16.h-z19.h},{z20.h-z23.h}' +.*: Error: selected processor does not support `famin {z0.s-z3.s},{z0.s-z3.s},{z0.s-z3.s}' +.*: Error: selected processor does not support `famin {z28.s-z31.s},{z28.s-z31.s},{z0.s-z3.s}' +.*: Error: selected processor does not support `famin {z0.s-z3.s},{z0.s-z3.s},{z28.s-z31.s}' +.*: Error: selected processor does not support `famin {z24.s-z27.s},{z24.s-z27.s},{z4.s-z7.s}' +.*: Error: selected processor does not support `famin {z0.d-z3.d},{z0.d-z3.d},{z0.d-z3.d}' +.*: Error: selected processor does not support `famin {z28.d-z31.d},{z28.d-z31.d},{z0.d-z3.d}' +.*: Error: selected processor does not support `famin {z0.d-z3.d},{z0.d-z3.d},{z28.d-z31.d}' +.*: Error: selected processor does not support `famin {z12.d-z15.d},{z12.d-z15.d},{z8.d-z11.d}' diff --git a/gas/testsuite/gas/aarch64/sme2-faminmax-illegal.d b/gas/testsuite/gas/aarch64/sme2-faminmax-illegal.d new file mode 100644 index 00000000000..d6ac3608e98 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-faminmax-illegal.d @@ -0,0 +1,3 @@ +#as: -march=armv8-a+faminmax+sme2 +#source: sme2-faminmax-illegal.s +#error_output: sme2-faminmax-illegal.l diff --git a/gas/testsuite/gas/aarch64/sme2-faminmax-illegal.l b/gas/testsuite/gas/aarch64/sme2-faminmax-illegal.l new file mode 100644 index 00000000000..6eb0a000f73 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-faminmax-illegal.l @@ -0,0 +1,87 @@ +[^ :]+: Assembler messages: +[^ :]+:[0-9]+: Error: operand mismatch -- `famax {z18\.h-z19\.h},{z18\.h-z19\.h},{z30\.s-z31\.s}' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: famax {z18\.h-z19\.h}, {z18\.h-z19\.h}, {z30\.h-z31\.h} +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: famax {z18\.s-z19\.s}, {z18\.s-z19\.s}, {z30\.s-z31\.s} +[^ :]+:[0-9]+: Info: famax {z18\.d-z19\.d}, {z18\.d-z19\.d}, {z30\.d-z31\.d} +[^ :]+:[0-9]+: Error: operand mismatch -- `famax {z30\.s-z31\.s},{z30\.s-z31\.s},{z18\.h-z19\.h}' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: famax {z30\.s-z31\.s}, {z30\.s-z31\.s}, {z18\.s-z19\.s} +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: famax {z30\.h-z31\.h}, {z30\.h-z31\.h}, {z18\.h-z19\.h} +[^ :]+:[0-9]+: Info: famax {z30\.d-z31\.d}, {z30\.d-z31\.d}, {z18\.d-z19\.d} +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `famax {z24\.s-z27\.s},{z24\.s-z27\.s},{z30\.s-z31\.s}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `famax {z30\.h-z31\.h},{z30\.h-z31\.h},{z24\.h-z27\.h}' +[^ :]+:[0-9]+: Error: operand mismatch -- `famin {z18\.h-z19\.h},{z18\.h-z19\.h},{z30\.s-z31\.s}' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: famin {z18\.h-z19\.h}, {z18\.h-z19\.h}, {z30\.h-z31\.h} +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: famin {z18\.s-z19\.s}, {z18\.s-z19\.s}, {z30\.s-z31\.s} +[^ :]+:[0-9]+: Info: famin {z18\.d-z19\.d}, {z18\.d-z19\.d}, {z30\.d-z31\.d} +[^ :]+:[0-9]+: Error: operand mismatch -- `famin {z30\.s-z31\.s},{z30\.s-z31\.s},{z18\.h-z19\.h}' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: famin {z30\.s-z31\.s}, {z30\.s-z31\.s}, {z18\.s-z19\.s} +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: famin {z30\.h-z31\.h}, {z30\.h-z31\.h}, {z18\.h-z19\.h} +[^ :]+:[0-9]+: Info: famin {z30\.d-z31\.d}, {z30\.d-z31\.d}, {z18\.d-z19\.d} +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `famin {z24\.s-z27\.s},{z24\.s-z27\.s},{z30\.s-z31\.s}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `famin {z30\.h-z31\.h},{z30\.h-z31\.h},{z24\.h-z27\.h}' +[^ :]+:[0-9]+: Error: operand mismatch -- `famax {z18\.b-z19\.b},{z18\.b-z19\.b},{z30\.b-z31\.b}' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: famax {z18\.h-z19\.h}, {z18\.h-z19\.h}, {z30\.h-z31\.h} +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: famax {z18\.s-z19\.s}, {z18\.s-z19\.s}, {z30\.s-z31\.s} +[^ :]+:[0-9]+: Info: famax {z18\.d-z19\.d}, {z18\.d-z19\.d}, {z30\.d-z31\.d} +[^ :]+:[0-9]+: Error: operand mismatch -- `famax {z24\.b-z27\.b},{z24\.b-z27\.b},{z19\.b-z22\.b}' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: famax {z24\.h-z27\.h}, {z24\.h-z27\.h}, {z19\.h-z22\.h} +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: famax {z24\.s-z27\.s}, {z24\.s-z27\.s}, {z19\.s-z22\.s} +[^ :]+:[0-9]+: Info: famax {z24\.d-z27\.d}, {z24\.d-z27\.d}, {z19\.d-z22\.d} +[^ :]+:[0-9]+: Error: operand mismatch -- `famin {z18\.b-z19\.b},{z18\.b-z19\.b},{z30\.b-z31\.b}' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: famin {z18\.h-z19\.h}, {z18\.h-z19\.h}, {z30\.h-z31\.h} +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: famin {z18\.s-z19\.s}, {z18\.s-z19\.s}, {z30\.s-z31\.s} +[^ :]+:[0-9]+: Info: famin {z18\.d-z19\.d}, {z18\.d-z19\.d}, {z30\.d-z31\.d} +[^ :]+:[0-9]+: Error: operand mismatch -- `famin {z24\.b-z27\.b},{z24\.b-z27\.b},{z19\.b-z22\.b}' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: famin {z24\.h-z27\.h}, {z24\.h-z27\.h}, {z19\.h-z22\.h} +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: famin {z24\.s-z27\.s}, {z24\.s-z27\.s}, {z19\.s-z22\.s} +[^ :]+:[0-9]+: Info: famin {z24\.d-z27\.d}, {z24\.d-z27\.d}, {z19\.d-z22\.d} +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `famax {z18\.h-z20\.h},{z18\.h-z20\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 1 -- `famax {z27\.s-z31\.s},{z27\.s-z31\.s},{z16\.s-z20\.s}' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `famax {z27\.s-z28\.s},{z27\.s-z30\.s},{z16\.s-z17\.s}' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `famin {z18\.h-z20\.h},{z18\.h-z20\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 1 -- `famin {z27\.s-z31\.s},{z27\.s-z31\.s},{z16\.s-z20\.s}' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `famin {z27\.s-z28\.s},{z27\.s-z30\.s},{z16\.s-z17\.s}' +[^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `famax {z18\.h-z19\.h}' +[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `famax {z18\.h-z19\.h},{z18\.h-z19\.h}' +[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `famax {z18\.h-z19\.h},{z18\.h-z19\.h},{z12\.h-z13\.h},{z12\.h-z13\.h}' +[^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `famin {z18\.h-z19\.h}' +[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `famin {z18\.h-z19\.h},{z18\.h-z19\.h}' +[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `famin {z18\.h-z19\.h},{z18\.h-z19\.h},{z12\.h-z13\.h},{z12\.h-z13\.h}' +[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 3 -- `famax {z18\.h-z19\.h},{z18\.h-z19\.h},{z30\.t-z31\.t}' +[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `famax {z18\.t-z19\.t},{z18\.h-z19\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 3 -- `famin {z18\.h-z19\.h},{z18\.h-z19\.h},{z30\.t-z31\.t}' +[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `famin {z18\.t-z19\.t},{z18\.h-z19\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: syntax error in register list at operand 3 -- `famax {z18\.h-z19\.h},{z18\.h-z19\.h},\{30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `famax {z18\.h-z19\.h},\{18\.h-z19\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: syntax error in register list at operand 1 -- `famax {z18\.h-19\.h},{z18\.h-z19\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: missing type suffix at operand 3 -- `famax {z18\.h-z19\.h},{z18\.h-z19\.h},{z30-z31\.h}' +[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `famax {z18\.h-z19\.h},{z18-z19\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: missing type suffix at operand 1 -- `famax {z18-z19\.h},{z18\.h-z19\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: syntax error in register list at operand 3 -- `famin {z18\.h-z19\.h},{z18\.h-z19\.h},\{30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `famin {z18\.h-z19\.h},\{18\.h-z19\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: syntax error in register list at operand 1 -- `famin {z18\.h-19\.h},{z18\.h-z19\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: missing type suffix at operand 3 -- `famin {z18\.h-z19\.h},{z18\.h-z19\.h},{z30-z31\.h}' +[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `famin {z18\.h-z19\.h},{z18-z19\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: missing type suffix at operand 1 -- `famin {z18-z19\.h},{z18\.h-z19\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `famax {z18\.h-z19\.h},{z18\.h-z19\.h},{z34\.h-z35\.h}' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `famax {z34\.h-z35\.h},{z34\.h-z35\.h},{z18\.h-z19\.h}' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `famin {z18\.h-z19\.h},{z18\.h-z19\.h},{z34\.h-z35\.h}' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `famin {z34\.h-z35\.h},{z34\.h-z35\.h},{z18\.h-z19\.h}' +[^ :]+:[0-9]+: Warning: SVE `movprfx' compatible instruction expected -- `famax {z18\.h-z19\.h},{z18\.h-z19\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Warning: SVE `movprfx' compatible instruction expected -- `famin {z18\.h-z19\.h},{z18\.h-z19\.h},{z30\.h-z31\.h}' diff --git a/gas/testsuite/gas/aarch64/sme2-faminmax-illegal.s b/gas/testsuite/gas/aarch64/sme2-faminmax-illegal.s new file mode 100644 index 00000000000..b104501df99 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-faminmax-illegal.s @@ -0,0 +1,63 @@ +// Operand mismatch +famax { z18.h - z19.h }, { z18.h - z19.h }, { z30.s - z31.s } +famax { z30.s - z31.s }, { z30.s - z31.s }, { z18.h - z19.h } +famax { z24.s - z27.s }, { z24.s - z27.s }, { z30.s - z31.s } +famax { z30.h - z31.h }, { z30.h - z31.h }, { z24.h - z27.h } +famin { z18.h - z19.h }, { z18.h - z19.h }, { z30.s - z31.s } +famin { z30.s - z31.s }, { z30.s - z31.s }, { z18.h - z19.h } +famin { z24.s - z27.s }, { z24.s - z27.s }, { z30.s - z31.s } +famin { z30.h - z31.h }, { z30.h - z31.h }, { z24.h - z27.h } + +// Disallowed types +famax { z18.b - z19.b }, { z18.b - z19.b }, { z30.b - z31.b } +famax { z24.b - z27.b }, { z24.b - z27.b }, { z19.b - z22.b } +famin { z18.b - z19.b }, { z18.b - z19.b }, { z30.b - z31.b } +famin { z24.b - z27.b }, { z24.b - z27.b }, { z19.b - z22.b } + +// Incorrect operands +famax { z18.h - z20.h }, { z18.h - z20.h }, { z30.h - z31.h } +famax { z27.s - z31.s }, { z27.s - z31.s }, { z16.s - z20.s } +famax { z27.s - z28.s }, { z27.s - z30.s }, { z16.s - z17.s } +famin { z18.h - z20.h }, { z18.h - z20.h }, { z30.h - z31.h } +famin { z27.s - z31.s }, { z27.s - z31.s }, { z16.s - z20.s } +famin { z27.s - z28.s }, { z27.s - z30.s }, { z16.s - z17.s } + +// Incorrect number of arguments +famax { z18.h - z19.h } +famax { z18.h - z19.h }, { z18.h - z19.h } +famax { z18.h - z19.h }, { z18.h - z19.h }, { z12.h - z13.h }, { z12.h - z13.h } +famin { z18.h - z19.h } +famin { z18.h - z19.h }, { z18.h - z19.h } +famin { z18.h - z19.h }, { z18.h - z19.h }, { z12.h - z13.h }, { z12.h - z13.h } + +// Spelling mistakes +famax { z18.h - z19.h }, { z18.h - z19.h }, { z30.t - z31.t } +famax { z18.t - z19.t }, { z18.h - z19.h }, { z30.h - z31.h } +famin { z18.h - z19.h }, { z18.h - z19.h }, { z30.t - z31.t } +famin { z18.t - z19.t }, { z18.h - z19.h }, { z30.h - z31.h } + +// Missing qualifers +famax { z18.h - z19.h }, { z18.h - z19.h }, { 30.h - z31.h } +famax { z18.h - z19.h }, { 18.h - z19.h }, { z30.h - z31.h } +famax { z18.h - 19.h }, { z18.h - z19.h }, { z30.h - z31.h } +famax { z18.h - z19.h }, { z18.h - z19.h }, { z30 - z31.h } +famax { z18.h - z19.h }, { z18 - z19.h }, { z30.h - z31.h } +famax { z18 - z19.h }, { z18.h - z19.h }, { z30.h - z31.h } +famin { z18.h - z19.h }, { z18.h - z19.h }, { 30.h - z31.h } +famin { z18.h - z19.h }, { 18.h - z19.h }, { z30.h - z31.h } +famin { z18.h - 19.h }, { z18.h - z19.h }, { z30.h - z31.h } +famin { z18.h - z19.h }, { z18.h - z19.h }, { z30 - z31.h } +famin { z18.h - z19.h }, { z18 - z19.h }, { z30.h - z31.h } +famin { z18 - z19.h }, { z18.h - z19.h }, { z30.h - z31.h } + +// Out of range numbers +famax { z18.h - z19.h }, { z18.h - z19.h }, { z34.h - z35.h } +famax { z34.h - z35.h }, { z34.h - z35.h }, { z18.h - z19.h } +famin { z18.h - z19.h }, { z18.h - z19.h }, { z34.h - z35.h } +famin { z34.h - z35.h }, { z34.h - z35.h }, { z18.h - z19.h } + +// Preceded by movprfx +movprfx z17, z9 +famax { z18.h - z19.h }, { z18.h - z19.h }, { z30.h - z31.h } +movprfx z17, z9 +famin { z18.h - z19.h }, { z18.h - z19.h }, { z30.h - z31.h } diff --git a/gas/testsuite/gas/aarch64/sme2-faminmax.d b/gas/testsuite/gas/aarch64/sme2-faminmax.d new file mode 100644 index 00000000000..9a6d69e30d8 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-faminmax.d @@ -0,0 +1,58 @@ +#objdump: -dr +#as: -march=armv8-a+faminmax+sme2 + +.*: file format .* + +Disassembly of section \.text: + +0+ <.*>: + 0: c160b140 famax {z0.h-z1.h}, {z0.h-z1.h}, {z0.h-z1.h} + 4: c160b15e famax {z30.h-z31.h}, {z30.h-z31.h}, {z0.h-z1.h} + 8: c17eb140 famax {z0.h-z1.h}, {z0.h-z1.h}, {z30.h-z31.h} + c: c17ab152 famax {z18.h-z19.h}, {z18.h-z19.h}, {z26.h-z27.h} + 10: c1a0b140 famax {z0.s-z1.s}, {z0.s-z1.s}, {z0.s-z1.s} + 14: c1a0b15e famax {z30.s-z31.s}, {z30.s-z31.s}, {z0.s-z1.s} + 18: c1beb140 famax {z0.s-z1.s}, {z0.s-z1.s}, {z30.s-z31.s} + 1c: c1aab144 famax {z4.s-z5.s}, {z4.s-z5.s}, {z10.s-z11.s} + 20: c1e0b140 famax {z0.d-z1.d}, {z0.d-z1.d}, {z0.d-z1.d} + 24: c1e0b15e famax {z30.d-z31.d}, {z30.d-z31.d}, {z0.d-z1.d} + 28: c1feb140 famax {z0.d-z1.d}, {z0.d-z1.d}, {z30.d-z31.d} + 2c: c1e8b15c famax {z28.d-z29.d}, {z28.d-z29.d}, {z8.d-z9.d} + 30: c160b940 famax {z0.h-z3.h}, {z0.h-z3.h}, {z0.h-z3.h} + 34: c160b95c famax {z28.h-z31.h}, {z28.h-z31.h}, {z0.h-z3.h} + 38: c17cb940 famax {z0.h-z3.h}, {z0.h-z3.h}, {z28.h-z31.h} + 3c: c174b950 famax {z16.h-z19.h}, {z16.h-z19.h}, {z20.h-z23.h} + 40: c1a0b940 famax {z0.s-z3.s}, {z0.s-z3.s}, {z0.s-z3.s} + 44: c1a0b95c famax {z28.s-z31.s}, {z28.s-z31.s}, {z0.s-z3.s} + 48: c1bcb940 famax {z0.s-z3.s}, {z0.s-z3.s}, {z28.s-z31.s} + 4c: c1a4b958 famax {z24.s-z27.s}, {z24.s-z27.s}, {z4.s-z7.s} + 50: c1e0b940 famax {z0.d-z3.d}, {z0.d-z3.d}, {z0.d-z3.d} + 54: c1e0b95c famax {z28.d-z31.d}, {z28.d-z31.d}, {z0.d-z3.d} + 58: c1fcb940 famax {z0.d-z3.d}, {z0.d-z3.d}, {z28.d-z31.d} + 5c: c1e8b94c famax {z12.d-z15.d}, {z12.d-z15.d}, {z8.d-z11.d} + 60: c128b94c .inst 0xc128b94c ; undefined + 64: c160b141 famin {z0.h-z1.h}, {z0.h-z1.h}, {z0.h-z1.h} + 68: c160b15f famin {z30.h-z31.h}, {z30.h-z31.h}, {z0.h-z1.h} + 6c: c17eb141 famin {z0.h-z1.h}, {z0.h-z1.h}, {z30.h-z31.h} + 70: c17ab153 famin {z18.h-z19.h}, {z18.h-z19.h}, {z26.h-z27.h} + 74: c1a0b141 famin {z0.s-z1.s}, {z0.s-z1.s}, {z0.s-z1.s} + 78: c1a0b15f famin {z30.s-z31.s}, {z30.s-z31.s}, {z0.s-z1.s} + 7c: c1beb141 famin {z0.s-z1.s}, {z0.s-z1.s}, {z30.s-z31.s} + 80: c1aab145 famin {z4.s-z5.s}, {z4.s-z5.s}, {z10.s-z11.s} + 84: c1e0b141 famin {z0.d-z1.d}, {z0.d-z1.d}, {z0.d-z1.d} + 88: c1e0b15f famin {z30.d-z31.d}, {z30.d-z31.d}, {z0.d-z1.d} + 8c: c1feb141 famin {z0.d-z1.d}, {z0.d-z1.d}, {z30.d-z31.d} + 90: c1e8b15d famin {z28.d-z29.d}, {z28.d-z29.d}, {z8.d-z9.d} + 94: c160b941 famin {z0.h-z3.h}, {z0.h-z3.h}, {z0.h-z3.h} + 98: c160b95d famin {z28.h-z31.h}, {z28.h-z31.h}, {z0.h-z3.h} + 9c: c17cb941 famin {z0.h-z3.h}, {z0.h-z3.h}, {z28.h-z31.h} + a0: c174b951 famin {z16.h-z19.h}, {z16.h-z19.h}, {z20.h-z23.h} + a4: c1a0b941 famin {z0.s-z3.s}, {z0.s-z3.s}, {z0.s-z3.s} + a8: c1a0b95d famin {z28.s-z31.s}, {z28.s-z31.s}, {z0.s-z3.s} + ac: c1bcb941 famin {z0.s-z3.s}, {z0.s-z3.s}, {z28.s-z31.s} + b0: c1a4b959 famin {z24.s-z27.s}, {z24.s-z27.s}, {z4.s-z7.s} + b4: c1e0b941 famin {z0.d-z3.d}, {z0.d-z3.d}, {z0.d-z3.d} + b8: c1e0b95d famin {z28.d-z31.d}, {z28.d-z31.d}, {z0.d-z3.d} + bc: c1fcb941 famin {z0.d-z3.d}, {z0.d-z3.d}, {z28.d-z31.d} + c0: c1e8b94d famin {z12.d-z15.d}, {z12.d-z15.d}, {z8.d-z11.d} + c4: c128b94d .inst 0xc128b94d ; undefined diff --git a/gas/testsuite/gas/aarch64/sme2-faminmax.s b/gas/testsuite/gas/aarch64/sme2-faminmax.s new file mode 100644 index 00000000000..7fdad8c9d5d --- /dev/null +++ b/gas/testsuite/gas/aarch64/sme2-faminmax.s @@ -0,0 +1,67 @@ +// Valid instructions +famax { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z1.h } +famax { z30.h - z31.h }, { z30.h - z31.h }, { z0.h - z1.h } +famax { z0.h - z1.h }, { z0.h - z1.h }, { z30.h - z31.h } +famax { z18.h - z19.h }, { z18.h - z19.h }, { z26.h - z27.h } + +famax { z0.s - z1.s }, { z0.s - z1.s }, { z0.s - z1.s } +famax { z30.s - z31.s }, { z30.s - z31.s }, { z0.s - z1.s } +famax { z0.s - z1.s }, { z0.s - z1.s }, { z30.s - z31.s } +famax { z4.s - z5.s }, { z4.s - z5.s }, { z10.s - z11.s } + +famax { z0.d - z1.d }, { z0.d - z1.d }, { z0.d - z1.d } +famax { z30.d - z31.d }, { z30.d - z31.d }, { z0.d - z1.d } +famax { z0.d - z1.d }, { z0.d - z1.d }, { z30.d - z31.d } +famax { z28.d - z29.d }, { z28.d - z29.d }, { z8.d - z9.d } + +famax { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h } +famax { z28.h - z31.h }, { z28.h - z31.h }, { z0.h - z3.h } +famax { z0.h - z3.h }, { z0.h - z3.h }, { z28.h - z31.h } +famax { z16.h - z19.h }, { z16.h - z19.h }, { z20.h - z23.h } + +famax { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s } +famax { z28.s - z31.s }, { z28.s - z31.s }, { z0.s - z3.s } +famax { z0.s - z3.s }, { z0.s - z3.s }, { z28.s - z31.s } +famax { z24.s - z27.s }, { z24.s - z27.s }, { z4.s - z7.s } + +famax { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d } +famax { z28.d - z31.d }, { z28.d - z31.d }, { z0.d - z3.d } +famax { z0.d - z3.d }, { z0.d - z3.d }, { z28.d - z31.d } +famax { z12.d - z15.d }, { z12.d - z15.d }, { z8.d - z11.d } + +// Invalid instruction because sz is 00 which is invalid +.inst 0xc128b94c + +// Valid instructions +famin { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z1.h } +famin { z30.h - z31.h }, { z30.h - z31.h }, { z0.h - z1.h } +famin { z0.h - z1.h }, { z0.h - z1.h }, { z30.h - z31.h } +famin { z18.h - z19.h }, { z18.h - z19.h }, { z26.h - z27.h } + +famin { z0.s - z1.s }, { z0.s - z1.s }, { z0.s - z1.s } +famin { z30.s - z31.s }, { z30.s - z31.s }, { z0.s - z1.s } +famin { z0.s - z1.s }, { z0.s - z1.s }, { z30.s - z31.s } +famin { z4.s - z5.s }, { z4.s - z5.s }, { z10.s - z11.s } + +famin { z0.d - z1.d }, { z0.d - z1.d }, { z0.d - z1.d } +famin { z30.d - z31.d }, { z30.d - z31.d }, { z0.d - z1.d } +famin { z0.d - z1.d }, { z0.d - z1.d }, { z30.d - z31.d } +famin { z28.d - z29.d }, { z28.d - z29.d }, { z8.d - z9.d } + +famin { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h } +famin { z28.h - z31.h }, { z28.h - z31.h }, { z0.h - z3.h } +famin { z0.h - z3.h }, { z0.h - z3.h }, { z28.h - z31.h } +famin { z16.h - z19.h }, { z16.h - z19.h }, { z20.h - z23.h } + +famin { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s } +famin { z28.s - z31.s }, { z28.s - z31.s }, { z0.s - z3.s } +famin { z0.s - z3.s }, { z0.s - z3.s }, { z28.s - z31.s } +famin { z24.s - z27.s }, { z24.s - z27.s }, { z4.s - z7.s } + +famin { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d } +famin { z28.d - z31.d }, { z28.d - z31.d }, { z0.d - z3.d } +famin { z0.d - z3.d }, { z0.d - z3.d }, { z28.d - z31.d } +famin { z12.d - z15.d }, { z12.d - z15.d }, { z8.d - z11.d } + +// Invalid instruction because sz is 00 which is invalid +.inst 0xc128B94d diff --git a/gas/testsuite/gas/aarch64/sve2-faminmax-bad.d b/gas/testsuite/gas/aarch64/sve2-faminmax-bad.d new file mode 100644 index 00000000000..9e0de7d274c --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve2-faminmax-bad.d @@ -0,0 +1,3 @@ +#as: -march=armv8-a+faminmax +#source: sve2-faminmax.s +#error_output: sve2-faminmax-bad.l \ No newline at end of file diff --git a/gas/testsuite/gas/aarch64/sve2-faminmax-bad.l b/gas/testsuite/gas/aarch64/sve2-faminmax-bad.l new file mode 100644 index 00000000000..8382dfdd8f0 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve2-faminmax-bad.l @@ -0,0 +1,81 @@ +[^ :]+: Assembler messages: +.*: Error: selected processor does not support `famax z0.h,p0/m,z0.h,z0.h' +.*: Error: selected processor does not support `famax z0.h,p2/m,z0.h,z0.h' +.*: Error: selected processor does not support `famax z0.h,p7/m,z0.h,z0.h' +.*: Error: selected processor does not support `famax z31.h,p0/m,z31.h,z0.h' +.*: Error: selected processor does not support `famax z31.h,p2/m,z31.h,z0.h' +.*: Error: selected processor does not support `famax z31.h,p7/m,z31.h,z0.h' +.*: Error: selected processor does not support `famax z0.h,p0/m,z0.h,z31.h' +.*: Error: selected processor does not support `famax z0.h,p2/m,z0.h,z31.h' +.*: Error: selected processor does not support `famax z0.h,p7/m,z0.h,z31.h' +.*: Error: selected processor does not support `famax z5.h,p0/m,z5.h,z7.h' +.*: Error: selected processor does not support `famax z5.h,p2/m,z5.h,z7.h' +.*: Error: selected processor does not support `famax z5.h,p7/m,z5.h,z7.h' +.*: Error: selected processor does not support `famax z0.s,p0/m,z0.s,z0.s' +.*: Error: selected processor does not support `famax z0.s,p2/m,z0.s,z0.s' +.*: Error: selected processor does not support `famax z0.s,p7/m,z0.s,z0.s' +.*: Error: selected processor does not support `famax z31.s,p0/m,z31.s,z0.s' +.*: Error: selected processor does not support `famax z31.s,p2/m,z31.s,z0.s' +.*: Error: selected processor does not support `famax z31.s,p7/m,z31.s,z0.s' +.*: Error: selected processor does not support `famax z0.s,p0/m,z0.s,z31.s' +.*: Error: selected processor does not support `famax z0.s,p2/m,z0.s,z31.s' +.*: Error: selected processor does not support `famax z0.s,p7/m,z0.s,z31.s' +.*: Error: selected processor does not support `famax z5.s,p0/m,z5.s,z7.s' +.*: Error: selected processor does not support `famax z5.s,p2/m,z5.s,z7.s' +.*: Error: selected processor does not support `famax z5.s,p7/m,z5.s,z7.s' +.*: Error: selected processor does not support `famax z0.d,p0/m,z0.d,z0.d' +.*: Error: selected processor does not support `famax z0.d,p2/m,z0.d,z0.d' +.*: Error: selected processor does not support `famax z0.d,p7/m,z0.d,z0.d' +.*: Error: selected processor does not support `famax z31.d,p0/m,z31.d,z0.d' +.*: Error: selected processor does not support `famax z31.d,p2/m,z31.d,z0.d' +.*: Error: selected processor does not support `famax z31.d,p7/m,z31.d,z0.d' +.*: Error: selected processor does not support `famax z0.d,p0/m,z0.d,z31.d' +.*: Error: selected processor does not support `famax z0.d,p2/m,z0.d,z31.d' +.*: Error: selected processor does not support `famax z0.d,p7/m,z0.d,z31.d' +.*: Error: selected processor does not support `famax z5.d,p0/m,z5.d,z7.d' +.*: Error: selected processor does not support `famax z5.d,p2/m,z5.d,z7.d' +.*: Error: selected processor does not support `famax z5.d,p7/m,z5.d,z7.d' +.*: Error: selected processor does not support `movprfx z5,z9' +.*: Error: selected processor does not support `famax z5.h,p7/m,z5.h,z7.h' +.*: Error: selected processor does not support `movprfx z5.d,p7/m,z8.d' +.*: Error: selected processor does not support `famax z5.d,p7/m,z5.d,z9.d' +.*: Error: selected processor does not support `famin z0.h,p0/m,z0.h,z0.h' +.*: Error: selected processor does not support `famin z0.h,p2/m,z0.h,z0.h' +.*: Error: selected processor does not support `famin z0.h,p7/m,z0.h,z0.h' +.*: Error: selected processor does not support `famin z31.h,p0/m,z31.h,z0.h' +.*: Error: selected processor does not support `famin z31.h,p2/m,z31.h,z0.h' +.*: Error: selected processor does not support `famin z31.h,p7/m,z31.h,z0.h' +.*: Error: selected processor does not support `famin z0.h,p0/m,z0.h,z31.h' +.*: Error: selected processor does not support `famin z0.h,p2/m,z0.h,z31.h' +.*: Error: selected processor does not support `famin z0.h,p7/m,z0.h,z31.h' +.*: Error: selected processor does not support `famin z5.h,p0/m,z5.h,z7.h' +.*: Error: selected processor does not support `famin z5.h,p2/m,z5.h,z7.h' +.*: Error: selected processor does not support `famin z5.h,p7/m,z5.h,z7.h' +.*: Error: selected processor does not support `famin z0.s,p0/m,z0.s,z0.s' +.*: Error: selected processor does not support `famin z0.s,p2/m,z0.s,z0.s' +.*: Error: selected processor does not support `famin z0.s,p7/m,z0.s,z0.s' +.*: Error: selected processor does not support `famin z31.s,p0/m,z31.s,z0.s' +.*: Error: selected processor does not support `famin z31.s,p2/m,z31.s,z0.s' +.*: Error: selected processor does not support `famin z31.s,p7/m,z31.s,z0.s' +.*: Error: selected processor does not support `famin z0.s,p0/m,z0.s,z31.s' +.*: Error: selected processor does not support `famin z0.s,p2/m,z0.s,z31.s' +.*: Error: selected processor does not support `famin z0.s,p7/m,z0.s,z31.s' +.*: Error: selected processor does not support `famin z5.s,p0/m,z5.s,z7.s' +.*: Error: selected processor does not support `famin z5.s,p2/m,z5.s,z7.s' +.*: Error: selected processor does not support `famin z5.s,p7/m,z5.s,z7.s' +.*: Error: selected processor does not support `famin z0.d,p0/m,z0.d,z0.d' +.*: Error: selected processor does not support `famin z0.d,p2/m,z0.d,z0.d' +.*: Error: selected processor does not support `famin z0.d,p7/m,z0.d,z0.d' +.*: Error: selected processor does not support `famin z31.d,p0/m,z31.d,z0.d' +.*: Error: selected processor does not support `famin z31.d,p2/m,z31.d,z0.d' +.*: Error: selected processor does not support `famin z31.d,p7/m,z31.d,z0.d' +.*: Error: selected processor does not support `famin z0.d,p0/m,z0.d,z31.d' +.*: Error: selected processor does not support `famin z0.d,p2/m,z0.d,z31.d' +.*: Error: selected processor does not support `famin z0.d,p7/m,z0.d,z31.d' +.*: Error: selected processor does not support `famin z5.d,p0/m,z5.d,z7.d' +.*: Error: selected processor does not support `famin z5.d,p2/m,z5.d,z7.d' +.*: Error: selected processor does not support `famin z5.d,p7/m,z5.d,z7.d' +.*: Error: selected processor does not support `movprfx z5,z9' +.*: Error: selected processor does not support `famin z5.h,p7/m,z5.h,z7.h' +.*: Error: selected processor does not support `movprfx z5.d,p7/m,z8.d' +.*: Error: selected processor does not support `famin z5.d,p7/m,z5.d,z9.d' diff --git a/gas/testsuite/gas/aarch64/sve2-faminmax-illegal.d b/gas/testsuite/gas/aarch64/sve2-faminmax-illegal.d new file mode 100644 index 00000000000..e1c6a5dc14c --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve2-faminmax-illegal.d @@ -0,0 +1,3 @@ +#as: -march=armv8-a+faminmax+sve2 +#source: sve2-faminmax-illegal.s +#error_output: sve2-faminmax-illegal.l \ No newline at end of file diff --git a/gas/testsuite/gas/aarch64/sve2-faminmax-illegal.l b/gas/testsuite/gas/aarch64/sve2-faminmax-illegal.l new file mode 100644 index 00000000000..55ce8e6085b --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve2-faminmax-illegal.l @@ -0,0 +1,123 @@ +[^ :]+: Assembler messages: +[^ :]+:[0-9]+: Error: operand mismatch -- `famax z5\.h,p0/m,z5\.h,z7\.s' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: famax z5\.h, p0/m, z5\.h, z7\.h +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: famax z5\.s, p0/m, z5\.s, z7\.s +[^ :]+:[0-9]+: Info: famax z5\.d, p0/m, z5\.d, z7\.d +[^ :]+:[0-9]+: Error: operand mismatch -- `famax z5\.s,p2/m,z5\.s,z7\.h' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: famax z5\.s, p2/m, z5\.s, z7\.s +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: famax z5\.h, p2/m, z5\.h, z7\.h +[^ :]+:[0-9]+: Info: famax z5\.d, p2/m, z5\.d, z7\.d +[^ :]+:[0-9]+: Error: operand mismatch -- `famin z5\.h,p0/m,z5\.h,z7\.s' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: famin z5\.h, p0/m, z5\.h, z7\.h +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: famin z5\.s, p0/m, z5\.s, z7\.s +[^ :]+:[0-9]+: Info: famin z5\.d, p0/m, z5\.d, z7\.d +[^ :]+:[0-9]+: Error: operand mismatch -- `famin z5\.s,p2/m,z5\.s,z7\.h' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: famin z5\.s, p2/m, z5\.s, z7\.s +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: famin z5\.h, p2/m, z5\.h, z7\.h +[^ :]+:[0-9]+: Info: famin z5\.d, p2/m, z5\.d, z7\.d +[^ :]+:[0-9]+: Error: operand 3 must be the same register as operand 1 -- `famax z5\.h,p0/m,z7\.h,z9\.h' +[^ :]+:[0-9]+: Error: operand 3 must be the same register as operand 1 -- `famin z5\.h,p0/m,z7\.h,z9\.h' +[^ :]+:[0-9]+: Error: operand mismatch -- `famax z5\.b,p2/m,z5\.b,z5\.b' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: famax z5\.h, p2/m, z5\.h, z5\.h +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: famax z5\.s, p2/m, z5\.s, z5\.s +[^ :]+:[0-9]+: Info: famax z5\.d, p2/m, z5\.d, z5\.d +[^ :]+:[0-9]+: Error: operand mismatch -- `famin z5\.b,p2/m,z5\.b,z5\.b' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: famin z5\.h, p2/m, z5\.h, z5\.h +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: famin z5\.s, p2/m, z5\.s, z5\.s +[^ :]+:[0-9]+: Info: famin z5\.d, p2/m, z5\.d, z5\.d +[^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `famax z5\.h' +[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `famax z5\.h,p2/m' +[^ :]+:[0-9]+: Error: comma expected between operands at operand 4 -- `famax z5\.h,p2/m,z5\.h' +[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 4 -- `famax z5\.h,p2/m,z5\.h,z6\.h,z6\.h' +[^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `famin z5\.h' +[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `famin z5\.h,p2/m' +[^ :]+:[0-9]+: Error: comma expected between operands at operand 4 -- `famin z5\.h,p2/m,z5\.h' +[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 4 -- `famin z5\.h,p2/m,z5\.h,z6\.h,z6\.h' +[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `famax z5\.t,p2/m,z5\.s,z7\.s' +[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 3 -- `famax z5\.s,p2/m,z5\.t,z7\.s' +[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 4 -- `famax z5\.s,p2/m,z5\.s,z7\.t' +[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 2 -- `famax z5\.s,j2/m,z5\.s,z7\.s' +[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `famin z5\.t,p2/m,z5\.s,z7\.s' +[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 3 -- `famin z5\.s,p2/m,z5\.t,z7\.s' +[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 4 -- `famin z5\.s,p2/m,z5\.s,z7\.t' +[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 2 -- `famin z5\.s,j2/m,z5\.s,z7\.s' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `famax 5\.h,p2/m,z5\.h,z7\.h' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `famax z5\.h,p2/m,5\.h,z7\.h' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 4 -- `famax z5\.h,p2/m,z5\.h,7\.h' +[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 2 -- `famax z5\.h,2/m,z5\.h,z7\.h' +[^ :]+:[0-9]+: Error: operand mismatch -- `famax z5,p2/m,z5\.h,z7\.h' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: famax z5\.h, p2/m, z5\.h, z7\.h +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: famax z5\.s, p2/m, z5\.s, z7\.s +[^ :]+:[0-9]+: Info: famax z5\.d, p2/m, z5\.d, z7\.d +[^ :]+:[0-9]+: Error: operand mismatch -- `famax z5\.h,p2/m,z5,z7\.h' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: famax z5\.h, p2/m, z5\.h, z7\.h +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: famax z5\.s, p2/m, z5\.s, z7\.s +[^ :]+:[0-9]+: Info: famax z5\.d, p2/m, z5\.d, z7\.d +[^ :]+:[0-9]+: Error: operand mismatch -- `famax z5\.h,p2/m,z5\.h,z7' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: famax z5\.h, p2/m, z5\.h, z7\.h +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: famax z5\.s, p2/m, z5\.s, z7\.s +[^ :]+:[0-9]+: Info: famax z5\.d, p2/m, z5\.d, z7\.d +[^ :]+:[0-9]+: Error: operand mismatch -- `famax z5\.h,p2,z5\.h,z7\.h' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: famax z5\.h, p2/m, z5\.h, z7\.h +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: famax z5\.s, p2/m, z5\.s, z7\.s +[^ :]+:[0-9]+: Info: famax z5\.d, p2/m, z5\.d, z7\.d +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `famin 5\.h,p2/m,z5\.h,z7\.h' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `famin z5\.h,p2/m,5\.h,z7\.h' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 4 -- `famin z5\.h,p2/m,z5\.h,7\.h' +[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 2 -- `famin z5\.h,2/m,z5\.h,z7\.h' +[^ :]+:[0-9]+: Error: operand mismatch -- `famin z5,p2/m,z5\.h,z7\.h' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: famin z5\.h, p2/m, z5\.h, z7\.h +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: famin z5\.s, p2/m, z5\.s, z7\.s +[^ :]+:[0-9]+: Info: famin z5\.d, p2/m, z5\.d, z7\.d +[^ :]+:[0-9]+: Error: operand mismatch -- `famin z5\.h,p2/m,z5,z7\.h' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: famin z5\.h, p2/m, z5\.h, z7\.h +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: famin z5\.s, p2/m, z5\.s, z7\.s +[^ :]+:[0-9]+: Info: famin z5\.d, p2/m, z5\.d, z7\.d +[^ :]+:[0-9]+: Error: operand mismatch -- `famin z5\.h,p2/m,z5\.h,z7' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: famin z5\.h, p2/m, z5\.h, z7\.h +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: famin z5\.s, p2/m, z5\.s, z7\.s +[^ :]+:[0-9]+: Info: famin z5\.d, p2/m, z5\.d, z7\.d +[^ :]+:[0-9]+: Error: operand mismatch -- `famin z5\.h,p2,z5\.h,z7\.h' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: famin z5\.h, p2/m, z5\.h, z7\.h +[^ :]+:[0-9]+: Info: other valid variant\(s\): +[^ :]+:[0-9]+: Info: famin z5\.s, p2/m, z5\.s, z7\.s +[^ :]+:[0-9]+: Info: famin z5\.d, p2/m, z5\.d, z7\.d +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `famax z35\.s,p2/m,z5\.s,z7\.s' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `famax z5\.s,p2/m,z35\.s,z7\.s' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 4 -- `famax z5\.s,p2/m,z5\.s,z35\.s' +[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `famax z5\.s,p9/m,z5\.s,z7\.s' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `famin z35\.s,p2/m,z5\.s,z7\.s' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `famin z5\.s,p2/m,z35\.s,z7\.s' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 4 -- `famin z5\.s,p2/m,z5\.s,z35\.s' +[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `famin z5\.s,p9/m,z5\.s,z7\.s' +[^ :]+:[0-9]+: Warning: output register of preceding `movprfx' not used in current instruction at operand 1 -- `famax z5\.h,p7/m,z5\.h,z7\.h' +[^ :]+:[0-9]+: Warning: predicate register differs from that in preceding `movprfx' at operand 2 -- `famax z5\.d,p7/m,z5\.d,z9\.d' +[^ :]+:[0-9]+: Warning: output register of preceding `movprfx' not used in current instruction at operand 1 -- `famin z5\.h,p7/m,z5\.h,z7\.h' +[^ :]+:[0-9]+: Warning: predicate register differs from that in preceding `movprfx' at operand 2 -- `famin z5\.d,p7/m,z5\.d,z9\.d' diff --git a/gas/testsuite/gas/aarch64/sve2-faminmax-illegal.s b/gas/testsuite/gas/aarch64/sve2-faminmax-illegal.s new file mode 100644 index 00000000000..6dab6655bb9 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve2-faminmax-illegal.s @@ -0,0 +1,71 @@ +// Operand mismatch +famax z5.h, p0/m, z5.h, z7.s +famax z5.s, p2/m, z5.s, z7.h +famin z5.h, p0/m, z5.h, z7.s +famin z5.s, p2/m, z5.s, z7.h + +// Incorrect operands +famax z5.h, p0/m, z7.h, z9.h +famin z5.h, p0/m, z7.h, z9.h + +// Disallowed types +famax z5.b, p2/m, z5.b, z5.b +famin z5.b, p2/m, z5.b, z5.b + +// Incorrect number of arguments +famax z5.h +famax z5.h, p2/m +famax z5.h, p2/m, z5.h +famax z5.h, p2/m, z5.h, z6.h, z6.h +famin z5.h +famin z5.h, p2/m +famin z5.h, p2/m, z5.h +famin z5.h, p2/m, z5.h, z6.h, z6.h + +// Spelling mistakes +famax z5.t, p2/m, z5.s, z7.s +famax z5.s, p2/m, z5.t, z7.s +famax z5.s, p2/m, z5.s, z7.t +famax z5.s, j2/m, z5.s, z7.s +famin z5.t, p2/m, z5.s, z7.s +famin z5.s, p2/m, z5.t, z7.s +famin z5.s, p2/m, z5.s, z7.t +famin z5.s, j2/m, z5.s, z7.s + +// Missing qualifiers +famax 5.h, p2/m, z5.h, z7.h +famax z5.h, p2/m, 5.h, z7.h +famax z5.h, p2/m, z5.h, 7.h +famax z5.h, 2/m, z5.h, z7.h +famax z5, p2/m, z5.h, z7.h +famax z5.h, p2/m, z5, z7.h +famax z5.h, p2/m, z5.h, z7 +famax z5.h, p2, z5.h, z7.h +famin 5.h, p2/m, z5.h, z7.h +famin z5.h, p2/m, 5.h, z7.h +famin z5.h, p2/m, z5.h, 7.h +famin z5.h, 2/m, z5.h, z7.h +famin z5, p2/m, z5.h, z7.h +famin z5.h, p2/m, z5, z7.h +famin z5.h, p2/m, z5.h, z7 +famin z5.h, p2, z5.h, z7.h + +// Out of range numbers +famax z35.s, p2/m, z5.s, z7.s +famax z5.s, p2/m, z35.s, z7.s +famax z5.s, p2/m, z5.s, z35.s +famax z5.s, p9/m, z5.s, z7.s +famin z35.s, p2/m, z5.s, z7.s +famin z5.s, p2/m, z35.s, z7.s +famin z5.s, p2/m, z5.s, z35.s +famin z5.s, p9/m, z5.s, z7.s + +// movprfx mismatch +movprfx z6, z9 +famax z5.h, p7/m, z5.h, z7.h +movprfx z5.d, p6/m, z8.d +famax z5.d, p7/m, z5.d, z9.d +movprfx z6, z9 +famin z5.h, p7/m, z5.h, z7.h +movprfx z5.d, p6/m, z8.d +famin z5.d, p7/m, z5.d, z9.d diff --git a/gas/testsuite/gas/aarch64/sve2-faminmax-warning.s b/gas/testsuite/gas/aarch64/sve2-faminmax-warning.s new file mode 100644 index 00000000000..e69de29bb2d diff --git a/gas/testsuite/gas/aarch64/sve2-faminmax.d b/gas/testsuite/gas/aarch64/sve2-faminmax.d new file mode 100644 index 00000000000..d85019ccd29 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve2-faminmax.d @@ -0,0 +1,90 @@ +#objdump: -dr +#as: -march=armv8-a+faminmax+sve2 + +.*: file format .* + +Disassembly of section \.text: + +0+ <.*>: + 0: 654e8000 famax z0.h, p0/m, z0.h, z0.h + 4: 654e8800 famax z0.h, p2/m, z0.h, z0.h + 8: 654e9c00 famax z0.h, p7/m, z0.h, z0.h + c: 654e801f famax z31.h, p0/m, z31.h, z0.h + 10: 654e881f famax z31.h, p2/m, z31.h, z0.h + 14: 654e9c1f famax z31.h, p7/m, z31.h, z0.h + 18: 654e83e0 famax z0.h, p0/m, z0.h, z31.h + 1c: 654e8be0 famax z0.h, p2/m, z0.h, z31.h + 20: 654e9fe0 famax z0.h, p7/m, z0.h, z31.h + 24: 654e80e5 famax z5.h, p0/m, z5.h, z7.h + 28: 654e88e5 famax z5.h, p2/m, z5.h, z7.h + 2c: 654e9ce5 famax z5.h, p7/m, z5.h, z7.h + 30: 658e8000 famax z0.s, p0/m, z0.s, z0.s + 34: 658e8800 famax z0.s, p2/m, z0.s, z0.s + 38: 658e9c00 famax z0.s, p7/m, z0.s, z0.s + 3c: 658e801f famax z31.s, p0/m, z31.s, z0.s + 40: 658e881f famax z31.s, p2/m, z31.s, z0.s + 44: 658e9c1f famax z31.s, p7/m, z31.s, z0.s + 48: 658e83e0 famax z0.s, p0/m, z0.s, z31.s + 4c: 658e8be0 famax z0.s, p2/m, z0.s, z31.s + 50: 658e9fe0 famax z0.s, p7/m, z0.s, z31.s + 54: 658e80e5 famax z5.s, p0/m, z5.s, z7.s + 58: 658e88e5 famax z5.s, p2/m, z5.s, z7.s + 5c: 658e9ce5 famax z5.s, p7/m, z5.s, z7.s + 60: 65ce8000 famax z0.d, p0/m, z0.d, z0.d + 64: 65ce8800 famax z0.d, p2/m, z0.d, z0.d + 68: 65ce9c00 famax z0.d, p7/m, z0.d, z0.d + 6c: 65ce801f famax z31.d, p0/m, z31.d, z0.d + 70: 65ce881f famax z31.d, p2/m, z31.d, z0.d + 74: 65ce9c1f famax z31.d, p7/m, z31.d, z0.d + 78: 65ce83e0 famax z0.d, p0/m, z0.d, z31.d + 7c: 65ce8be0 famax z0.d, p2/m, z0.d, z31.d + 80: 65ce9fe0 famax z0.d, p7/m, z0.d, z31.d + 84: 65ce80e5 famax z5.d, p0/m, z5.d, z7.d + 88: 65ce88e5 famax z5.d, p2/m, z5.d, z7.d + 8c: 65ce9ce5 famax z5.d, p7/m, z5.d, z7.d + 90: 0420bd25 movprfx z5, z9 + 94: 654e9ce5 famax z5.h, p7/m, z5.h, z7.h + 98: 04d13d05 movprfx z5.d, p7/m, z8.d + 9c: 65ce9d25 famax z5.d, p7/m, z5.d, z9.d + a0: 650e9d25 .inst 0x650e9d25 ; undefined + a4: 654f8000 famin z0.h, p0/m, z0.h, z0.h + a8: 654f8800 famin z0.h, p2/m, z0.h, z0.h + ac: 654f9c00 famin z0.h, p7/m, z0.h, z0.h + b0: 654f801f famin z31.h, p0/m, z31.h, z0.h + b4: 654f881f famin z31.h, p2/m, z31.h, z0.h + b8: 654f9c1f famin z31.h, p7/m, z31.h, z0.h + bc: 654f83e0 famin z0.h, p0/m, z0.h, z31.h + c0: 654f8be0 famin z0.h, p2/m, z0.h, z31.h + c4: 654f9fe0 famin z0.h, p7/m, z0.h, z31.h + c8: 654f80e5 famin z5.h, p0/m, z5.h, z7.h + cc: 654f88e5 famin z5.h, p2/m, z5.h, z7.h + d0: 654f9ce5 famin z5.h, p7/m, z5.h, z7.h + d4: 658f8000 famin z0.s, p0/m, z0.s, z0.s + d8: 658f8800 famin z0.s, p2/m, z0.s, z0.s + dc: 658f9c00 famin z0.s, p7/m, z0.s, z0.s + e0: 658f801f famin z31.s, p0/m, z31.s, z0.s + e4: 658f881f famin z31.s, p2/m, z31.s, z0.s + e8: 658f9c1f famin z31.s, p7/m, z31.s, z0.s + ec: 658f83e0 famin z0.s, p0/m, z0.s, z31.s + f0: 658f8be0 famin z0.s, p2/m, z0.s, z31.s + f4: 658f9fe0 famin z0.s, p7/m, z0.s, z31.s + f8: 658f80e5 famin z5.s, p0/m, z5.s, z7.s + fc: 658f88e5 famin z5.s, p2/m, z5.s, z7.s + 100: 658f9ce5 famin z5.s, p7/m, z5.s, z7.s + 104: 65cf8000 famin z0.d, p0/m, z0.d, z0.d + 108: 65cf8800 famin z0.d, p2/m, z0.d, z0.d + 10c: 65cf9c00 famin z0.d, p7/m, z0.d, z0.d + 110: 65cf801f famin z31.d, p0/m, z31.d, z0.d + 114: 65cf881f famin z31.d, p2/m, z31.d, z0.d + 118: 65cf9c1f famin z31.d, p7/m, z31.d, z0.d + 11c: 65cf83e0 famin z0.d, p0/m, z0.d, z31.d + 120: 65cf8be0 famin z0.d, p2/m, z0.d, z31.d + 124: 65cf9fe0 famin z0.d, p7/m, z0.d, z31.d + 128: 65cf80e5 famin z5.d, p0/m, z5.d, z7.d + 12c: 65cf88e5 famin z5.d, p2/m, z5.d, z7.d + 130: 65cf9ce5 famin z5.d, p7/m, z5.d, z7.d + 134: 0420bd25 movprfx z5, z9 + 138: 654f9ce5 famin z5.h, p7/m, z5.h, z7.h + 13c: 04d13d05 movprfx z5.d, p7/m, z8.d + 140: 65cf9d25 famin z5.d, p7/m, z5.d, z9.d + 144: 650f9d25 .inst 0x650f9d25 ; undefined \ No newline at end of file diff --git a/gas/testsuite/gas/aarch64/sve2-faminmax.s b/gas/testsuite/gas/aarch64/sve2-faminmax.s new file mode 100644 index 00000000000..ae00a9e71d1 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve2-faminmax.s @@ -0,0 +1,95 @@ +// Valid instructions +famax z0.h, p0/m, z0.h, z0.h +famax z0.h, p2/m, z0.h, z0.h +famax z0.h, p7/m, z0.h, z0.h +famax z31.h, p0/m, z31.h, z0.h +famax z31.h, p2/m, z31.h, z0.h +famax z31.h, p7/m, z31.h, z0.h +famax z0.h, p0/m, z0.h, z31.h +famax z0.h, p2/m, z0.h, z31.h +famax z0.h, p7/m, z0.h, z31.h +famax z5.h, p0/m, z5.h, z7.h +famax z5.h, p2/m, z5.h, z7.h +famax z5.h, p7/m, z5.h, z7.h + +famax z0.s, p0/m, z0.s, z0.s +famax z0.s, p2/m, z0.s, z0.s +famax z0.s, p7/m, z0.s, z0.s +famax z31.s, p0/m, z31.s, z0.s +famax z31.s, p2/m, z31.s, z0.s +famax z31.s, p7/m, z31.s, z0.s +famax z0.s, p0/m, z0.s, z31.s +famax z0.s, p2/m, z0.s, z31.s +famax z0.s, p7/m, z0.s, z31.s +famax z5.s, p0/m, z5.s, z7.s +famax z5.s, p2/m, z5.s, z7.s +famax z5.s, p7/m, z5.s, z7.s + +famax z0.d, p0/m, z0.d, z0.d +famax z0.d, p2/m, z0.d, z0.d +famax z0.d, p7/m, z0.d, z0.d +famax z31.d, p0/m, z31.d, z0.d +famax z31.d, p2/m, z31.d, z0.d +famax z31.d, p7/m, z31.d, z0.d +famax z0.d, p0/m, z0.d, z31.d +famax z0.d, p2/m, z0.d, z31.d +famax z0.d, p7/m, z0.d, z31.d +famax z5.d, p0/m, z5.d, z7.d +famax z5.d, p2/m, z5.d, z7.d +famax z5.d, p7/m, z5.d, z7.d + +movprfx z5, z9 +famax z5.h, p7/m, z5.h, z7.h +movprfx z5.d, p7/m, z8.d +famax z5.d, p7/m, z5.d, z9.d + +// Invalid instruction because sz is 00 which is reserved +.inst 0x650e9d25 + +// Valid instructions +famin z0.h, p0/m, z0.h, z0.h +famin z0.h, p2/m, z0.h, z0.h +famin z0.h, p7/m, z0.h, z0.h +famin z31.h, p0/m, z31.h, z0.h +famin z31.h, p2/m, z31.h, z0.h +famin z31.h, p7/m, z31.h, z0.h +famin z0.h, p0/m, z0.h, z31.h +famin z0.h, p2/m, z0.h, z31.h +famin z0.h, p7/m, z0.h, z31.h +famin z5.h, p0/m, z5.h, z7.h +famin z5.h, p2/m, z5.h, z7.h +famin z5.h, p7/m, z5.h, z7.h + +famin z0.s, p0/m, z0.s, z0.s +famin z0.s, p2/m, z0.s, z0.s +famin z0.s, p7/m, z0.s, z0.s +famin z31.s, p0/m, z31.s, z0.s +famin z31.s, p2/m, z31.s, z0.s +famin z31.s, p7/m, z31.s, z0.s +famin z0.s, p0/m, z0.s, z31.s +famin z0.s, p2/m, z0.s, z31.s +famin z0.s, p7/m, z0.s, z31.s +famin z5.s, p0/m, z5.s, z7.s +famin z5.s, p2/m, z5.s, z7.s +famin z5.s, p7/m, z5.s, z7.s + +famin z0.d, p0/m, z0.d, z0.d +famin z0.d, p2/m, z0.d, z0.d +famin z0.d, p7/m, z0.d, z0.d +famin z31.d, p0/m, z31.d, z0.d +famin z31.d, p2/m, z31.d, z0.d +famin z31.d, p7/m, z31.d, z0.d +famin z0.d, p0/m, z0.d, z31.d +famin z0.d, p2/m, z0.d, z31.d +famin z0.d, p7/m, z0.d, z31.d +famin z5.d, p0/m, z5.d, z7.d +famin z5.d, p2/m, z5.d, z7.d +famin z5.d, p7/m, z5.d, z7.d + +movprfx z5, z9 +famin z5.h, p7/m, z5.h, z7.h +movprfx z5.d, p7/m, z8.d +famin z5.d, p7/m, z5.d, z9.d + +// Invalid instruction because sz is 00 which is reserved +.inst 0x650f9d25 diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index 02ee0fc2566..88a4f3fd0d7 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -228,6 +228,8 @@ enum aarch64_feature_bit { AARCH64_FEATURE_SVE2p1, /* RCPC3 instructions. */ AARCH64_FEATURE_RCPC3, + /* FAMINMAX instructions. */ + AARCH64_FEATURE_FAMINMAX, AARCH64_NUM_FEATURES }; diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h index 9ea4de01c60..6bf42c6d22d 100644 --- a/opcodes/aarch64-tbl.h +++ b/opcodes/aarch64-tbl.h @@ -2649,6 +2649,12 @@ static const aarch64_feature_set aarch64_feature_sve2p1 = AARCH64_FEATURE (SVE2p1); static const aarch64_feature_set aarch64_feature_rcpc3 = AARCH64_FEATURE (RCPC3); +static const aarch64_feature_set aarch64_feature_faminmax = + AARCH64_FEATURE (FAMINMAX); +static const aarch64_feature_set aarch64_feature_faminmax_sve2 = + AARCH64_FEATURES (2, FAMINMAX, SVE2); +static const aarch64_feature_set aarch64_feature_faminmax_sme2 = + AARCH64_FEATURES (3, SVE2, FAMINMAX, SME2); #define CORE &aarch64_feature_v8 @@ -2716,6 +2722,9 @@ static const aarch64_feature_set aarch64_feature_rcpc3 = #define SME2p1 &aarch64_feature_sme2p1 #define SVE2p1 &aarch64_feature_sve2p1 #define RCPC3 &aarch64_feature_rcpc3 +#define FAMINMAX &aarch64_feature_faminmax +#define FAMINMAX_SVE2 &aarch64_feature_faminmax_sve2 +#define FAMINMAX_SME2 &aarch64_feature_faminmax_sme2 #define CORE_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS) \ { NAME, OPCODE, MASK, CLASS, OP, CORE, OPS, QUALS, FLAGS, 0, 0, NULL } @@ -2888,6 +2897,14 @@ static const aarch64_feature_set aarch64_feature_rcpc3 = { NAME, OPCODE, MASK, the, 0, D128_THE, OPS, QUALS, FLAGS, 0, 0, NULL } #define RCPC3_INSN(NAME,OPCODE,MASK,CLASS,OPS,QUALS,FLAGS) \ { NAME, OPCODE, MASK, CLASS, 0, RCPC3, OPS, QUALS, FLAGS, 0, 0, NULL } +#define FAMINMAX_INSN(NAME,OPCODE,MASK,OPS,QUALS,FLAGS) \ + { NAME, OPCODE, MASK, asimdsame, 0, FAMINMAX, OPS, QUALS, FLAGS, 0, 0, NULL } +#define FAMINMAX_SVE2_INSN(NAME,OPCODE,MASK,OPS,QUALS,CONSTRAINTS) \ + { NAME, OPCODE, MASK, sve_size_hsd, 0, FAMINMAX_SVE2, OPS, QUALS, \ + 0 | F_STRICT, CONSTRAINTS, 2, NULL } +#define FAMINMAX_SME2_INSN(NAME,OPCODE,MASK,OPS,QUALS) \ + { NAME, OPCODE, MASK, sme_size_22_hsd, 0, FAMINMAX_SME2, OPS, QUALS, \ + F_STRICT | 0, 0, 1, NULL } #define MOPS_CPY_OP1_OP2_PME_INSN(NAME, OPCODE, MASK, FLAGS, CONSTRAINTS) \ MOPS_INSN (NAME, OPCODE, MASK, 0, \ @@ -4225,6 +4242,19 @@ const struct aarch64_opcode aarch64_opcode_table[] = RCPC3_INSN ("ldap1", 0x0d418400, 0xbffffc00, rcpc3, OP2 (LEt, SIMD_ADDR_SIMPLE), QL_SIMD_IMM_D, F_OD(1)), RCPC3_INSN ("ldapur", 0x1d400800, 0x3f600C00, rcpc3, OP2 (Ft, RCPC3_ADDR_OFFSET), QL_LDST_FP, F_RCPC3_SIZE), RCPC3_INSN ("stlur", 0x1d000800, 0x3f600C00, rcpc3, OP2 (Ft, RCPC3_ADDR_OFFSET), QL_LDST_FP, F_RCPC3_SIZE), + /* AdvSIMD faminmax. */ + FAMINMAX_INSN ("famax", 0xec01c00, 0xbfe0fc00, OP3 (Vd, Vn, Vm), QL_V3SAMEH, F_SIZEQ), + FAMINMAX_INSN ("famax", 0xea0dc00, 0xbfa0fc00, OP3 (Vd, Vn, Vm), QL_V3SAMESD, F_SIZEQ), + FAMINMAX_INSN ("famin", 0x2ec01c00, 0xbfe0fc00, OP3 (Vd, Vn, Vm), QL_V3SAMEH, F_SIZEQ), + FAMINMAX_INSN ("famin", 0x2ea0dc00, 0xbfa0fc00, OP3 (Vd, Vn, Vm), QL_V3SAMESD, F_SIZEQ), + /* SVE2 faminmax. */ + FAMINMAX_SVE2_INSN ("famax", 0x650e8000, 0xff3fe000, OP4 (SVE_Zd, SVE_Pg3, SVE_Zd, SVE_Zm_5), OP_SVE_VMVV_HSD, C_SCAN_MOVPRFX), + FAMINMAX_SVE2_INSN ("famin", 0x650f8000, 0xff3fe000, OP4 (SVE_Zd, SVE_Pg3, SVE_Zd, SVE_Zm_5), OP_SVE_VMVV_HSD, C_SCAN_MOVPRFX), + /* SME2 faminmax. */ + FAMINMAX_SME2_INSN ("famax", 0xc120b140, 0xff21ffe1, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_HSD), + FAMINMAX_SME2_INSN ("famax", 0xc120b940, 0xff23ffe3, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zmx4), OP_SVE_VVV_HSD), + FAMINMAX_SME2_INSN ("famin", 0xc120b141, 0xff21ffe1, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_HSD), + FAMINMAX_SME2_INSN ("famin", 0xc120b941, 0xff23ffe3, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zmx4), OP_SVE_VVV_HSD), /* Move wide (immediate). */ CORE_INSN ("movn", 0x12800000, 0x7f800000, movewide, OP_MOVN, OP2 (Rd, HALF), QL_DST_R, F_SF | F_HAS_ALIAS), CORE_INSN ("mov", 0x12800000, 0x7f800000, movewide, OP_MOV_IMM_WIDEN, OP2 (Rd, IMM_MOV), QL_DST_R, F_SF | F_ALIAS | F_CONV), -- 2.43.0