From: Gavin Romig-Koch <gavin@cygnus.com>
To: binutils@sourceware.cygnus.com
Subject: MIPS PATCH: OPCODE_IS_MEMBER
Date: Fri, 22 Oct 1999 11:47:00 -0000 [thread overview]
Message-ID: <m11ejhY-000s9vC@cetus.cygnus.com> (raw)
This MIPS patch takes the code that determines if an opcode is a
member of a particular ISA from three places in two files and
moves it into "include/opcode/mips.h".
OK to commit?
-gavin...
For include/opcode:
* mips.h (OPCODE_IS_MEMBER): New.
For gas:
* config/tc-mips.c (macro_build): Use OPCODE_IS_MEMBER.
(mips_ip): Use OPCODE_IS_MEMBER.
For opcodes:
* mips-dis.c (_print_insn_mips): Use OPCODE_IS_MEMBER.
Index: binutils/gas/config/tc-mips.c
===================================================================
RCS file: /cvs/binutils/binutils/gas/config/tc-mips.c,v
retrieving revision 1.7
diff -c -p -r1.7 tc-mips.c
*** tc-mips.c 1999/10/21 13:23:31 1.7
--- tc-mips.c 1999/10/22 18:35:11
*************** macro_build (place, counter, ep, name, f
*** 2424,2430 ****
struct mips_cl_insn insn;
bfd_reloc_code_real_type r;
va_list args;
- int insn_isa;
#ifdef USE_STDARG
va_start (args, fmt);
--- 2424,2429 ----
*************** macro_build (place, counter, ep, name, f
*** 2458,2488 ****
/* Search until we get a match for NAME. */
while (1)
{
- insn_isa = 0;
-
- if ((insn.insn_mo->membership & INSN_ISA) == INSN_ISA1)
- insn_isa = 1;
- else if ((insn.insn_mo->membership & INSN_ISA) == INSN_ISA2)
- insn_isa = 2;
- else if ((insn.insn_mo->membership & INSN_ISA) == INSN_ISA3)
- insn_isa = 3;
- else if ((insn.insn_mo->membership & INSN_ISA) == INSN_ISA4)
- insn_isa = 4;
-
if (strcmp (fmt, insn.insn_mo->args) == 0
&& insn.insn_mo->pinfo != INSN_MACRO
! && ((insn_isa != 0
! && insn_isa <= mips_opts.isa)
! || (mips_cpu == 4650
! && (insn.insn_mo->membership & INSN_4650) != 0)
! || (mips_cpu == 4010
! && (insn.insn_mo->membership & INSN_4010) != 0)
! || ((mips_cpu == 4100
! || mips_cpu == 4111
! )
! && (insn.insn_mo->membership & INSN_4100) != 0)
! || (mips_cpu == 3900
! && (insn.insn_mo->membership & INSN_3900) != 0))
&& (mips_cpu != 4650 || (insn.insn_mo->pinfo & FP_D) == 0))
break;
--- 2457,2465 ----
/* Search until we get a match for NAME. */
while (1)
{
if (strcmp (fmt, insn.insn_mo->args) == 0
&& insn.insn_mo->pinfo != INSN_MACRO
! && OPCODE_IS_MEMBER (insn.insn_mo, mips_opts.isa, mips_cpu)
&& (mips_cpu != 4650 || (insn.insn_mo->pinfo & FP_D) == 0))
break;
*************** mips_ip (str, ip)
*** 7028,7064 ****
argsStart = s;
for (;;)
{
- int insn_isa;
boolean ok;
assert (strcmp (insn->name, str) == 0);
-
- insn_isa = 0;
- if ((insn->membership & INSN_ISA) == INSN_ISA1)
- insn_isa = 1;
- else if ((insn->membership & INSN_ISA) == INSN_ISA2)
- insn_isa = 2;
- else if ((insn->membership & INSN_ISA) == INSN_ISA3)
- insn_isa = 3;
- else if ((insn->membership & INSN_ISA) == INSN_ISA4)
- insn_isa = 4;
! if (insn_isa != 0
! && insn_isa <= mips_opts.isa)
ok = true;
! else if (insn->pinfo == INSN_MACRO)
! ok = false;
! else if ((mips_cpu == 4650 && (insn->membership & INSN_4650) != 0)
! || (mips_cpu == 4010 && (insn->membership & INSN_4010) != 0)
! || ((mips_cpu == 4100
! || mips_cpu == 4111
! )
! && (insn->membership & INSN_4100) != 0)
! || (mips_cpu == 3900 && (insn->membership & INSN_3900) != 0))
! ok = true;
! else
ok = false;
!
if (insn->pinfo != INSN_MACRO)
{
if (mips_cpu == 4650 && (insn->pinfo & FP_D) != 0)
--- 7005,7019 ----
argsStart = s;
for (;;)
{
boolean ok;
assert (strcmp (insn->name, str) == 0);
! if (OPCODE_IS_MEMBER (insn, mips_opts.isa, mips_cpu))
ok = true;
! else
ok = false;
!
if (insn->pinfo != INSN_MACRO)
{
if (mips_cpu == 4650 && (insn->pinfo & FP_D) != 0)
*************** mips_ip (str, ip)
*** 7073,7090 ****
++insn;
continue;
}
-
- if (insn_isa == 0
- || insn_isa <= mips_opts.isa)
- insn_error = _("opcode not supported on this processor");
else
{
static char buf[100];
!
! sprintf (buf, _("opcode requires -mips%d or greater"), insn_isa);
insn_error = buf;
}
- return;
}
ip->insn_mo = insn;
--- 7028,7043 ----
++insn;
continue;
}
else
{
static char buf[100];
! sprintf (buf,
! _("opcode not supported on this processor: %d (MIPS%d)"),
! mips_cpu, mips_opts.isa);
!
insn_error = buf;
+ return;
}
}
ip->insn_mo = insn;
Index: binutils/include/opcode/mips.h
===================================================================
RCS file: /cvs/binutils/binutils/include/opcode/mips.h,v
retrieving revision 1.1.1.1
diff -c -p -r1.1.1.1 mips.h
*** mips.h 1999/05/03 07:29:05 1.1.1.1
--- mips.h 1999/10/22 18:35:20
*************** struct mips_opcode
*** 319,324 ****
--- 319,342 ----
/* Toshiba R3900 instruction. */
#define INSN_3900 0x00000080
+ /* Test for membership in an ISA including chip specific ISAs.
+ INSN is pointer to an element of the opcode table; ISA is the
+ specified ISA to test against; and CPU is the CPU specific ISA
+ to test, or zero if no CPU specific ISA test is desired. */
+
+ #define OPCODE_IS_MEMBER(insn,isa,cpu) \
+ ((((insn)->membership & INSN_ISA) != 0 \
+ && ((insn)->membership & INSN_ISA) <= isa) \
+ || (cpu == 4650 \
+ && ((insn)->membership & INSN_4650) != 0) \
+ || (cpu == 4010 \
+ && ((insn)->membership & INSN_4010) != 0) \
+ || ((cpu == 4100 \
+ || cpu == 4111 \
+ ) \
+ && ((insn)->membership & INSN_4100) != 0) \
+ || (cpu == 3900 \
+ && ((insn)->membership & INSN_3900) != 0))
/* This is a list of macro expanded instructions.
*
Index: binutils/opcodes/mips-dis.c
===================================================================
RCS file: /cvs/binutils/binutils/opcodes/mips-dis.c,v
retrieving revision 1.1.1.1
diff -c -p -r1.1.1.1 mips-dis.c
*** mips-dis.c 1999/05/03 07:28:59 1.1.1.1
--- mips-dis.c 1999/10/22 18:35:23
*************** _print_insn_mips (memaddr, word, info)
*** 387,414 ****
if (op->pinfo != INSN_MACRO && (word & op->mask) == op->match)
{
register const char *d;
- int insn_isa;
! if ((op->membership & INSN_ISA) == INSN_ISA1)
! insn_isa = 1;
! else if ((op->membership & INSN_ISA) == INSN_ISA2)
! insn_isa = 2;
! else if ((op->membership & INSN_ISA) == INSN_ISA3)
! insn_isa = 3;
! else if ((op->membership & INSN_ISA) == INSN_ISA4)
! insn_isa = 4;
! else
! insn_isa = 15;
!
! if (insn_isa > mips_isa
! && (target_processor == 4650
! && op->membership & INSN_4650) == 0
! && (target_processor == 4010
! && op->membership & INSN_4010) == 0
! && (target_processor == 4100
! && op->membership & INSN_4100) == 0
! && (target_processor == 3900
! && op->membership & INSN_3900) == 0)
continue;
(*info->fprintf_func) (info->stream, "%s", op->name);
--- 387,394 ----
if (op->pinfo != INSN_MACRO && (word & op->mask) == op->match)
{
register const char *d;
! if (! OPCODE_IS_MEMBER (op, mips_isa, target_processor))
continue;
(*info->fprintf_func) (info->stream, "%s", op->name);
next reply other threads:[~1999-10-22 11:47 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
1999-10-22 11:47 Gavin Romig-Koch [this message]
1999-10-22 15:12 ` Ian Lance Taylor
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