From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 7963 invoked by alias); 28 Jan 2012 01:55:05 -0000 Received: (qmail 7847 invoked by uid 22791); 28 Jan 2012 01:55:04 -0000 X-SWARE-Spam-Status: No, hits=-2.6 required=5.0 tests=AWL,BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,RCVD_IN_DNSWL_LOW,T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mail-iy0-f169.google.com (HELO mail-iy0-f169.google.com) (209.85.210.169) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Sat, 28 Jan 2012 01:54:51 +0000 Received: by iadk27 with SMTP id k27so3584577iad.0 for ; Fri, 27 Jan 2012 17:54:51 -0800 (PST) Received: by 10.50.10.225 with SMTP id l1mr8773419igb.9.1327715691320; Fri, 27 Jan 2012 17:54:51 -0800 (PST) Received: by 10.50.10.225 with SMTP id l1mr8773398igb.9.1327715691218; Fri, 27 Jan 2012 17:54:51 -0800 (PST) Received: from coign.google.com ([72.14.225.65]) by mx.google.com with ESMTPS id ba5sm4517409igb.6.2012.01.27.17.54.49 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 27 Jan 2012 17:54:50 -0800 (PST) From: Ian Lance Taylor To: Aleksandar Simeonov Cc: "Fuhler\, Rich" , mips-compiler@rt-rk.com, binutils Subject: Re: Initial MIPS patch for GOLD - version 3 References: <4F1ED098.2060508@RT-RK.com> Date: Sat, 28 Jan 2012 01:55:00 -0000 In-Reply-To: <4F1ED098.2060508@RT-RK.com> (Aleksandar Simeonov's message of "Tue, 24 Jan 2012 16:39:04 +0100") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/23.1 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii X-IsSubscribed: yes Mailing-List: contact binutils-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: binutils-owner@sourceware.org X-SW-Source: 2012-01/txt/msg00264.txt.bz2 Aleksandar Simeonov writes: > * reloc.cc (Sized_relobj_file::write_sections): Special > handling of MIPS .reginfo section. > - .reginfo section is generated by linker and needs special handling. I haven't thought about everything, but I can see that this patch is not going to work as is. It will fail when linking a non-MIPS object which happens to have a section type == SHT_MIPS_REGINFO. We can't use processor-specific values like SHT_MIPS_REGINFO outside of the CPU.cc file. > * layout.cc (Layout::segment_precedes): Fixed order of MIPS specific > segments. > - MIPS needs to have PT_MIPS_REGINFO segment before any loadable segment. This is similarly troubling, though probably less serious. > - MIPS needs to have PT_NULL segment to be last in list of segments. Why would we ever have a PT_NULL segment? Ian