From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pj1-x102e.google.com (mail-pj1-x102e.google.com [IPv6:2607:f8b0:4864:20::102e]) by sourceware.org (Postfix) with ESMTPS id 5CE593858D3C for ; Tue, 29 Nov 2022 03:01:18 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 5CE593858D3C Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=dabbelt.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=dabbelt.com Received: by mail-pj1-x102e.google.com with SMTP id u15-20020a17090a3fcf00b002191825cf02so7715884pjm.2 for ; Mon, 28 Nov 2022 19:01:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=dabbelt-com.20210112.gappssmtp.com; s=20210112; h=message-id:to:from:cc:in-reply-to:subject:date:from:to:cc:subject :date:message-id:reply-to; bh=QiuzZ5eE76511TiIltgznnd+Ml7n+JGZ4WUr2TKDhik=; b=cOQBRXy/z9eB5jxgs/nYjXqzDwvm7S9jmmku23UXtgrCgrTPQsQzP8TSexBUOKJsni 3/EZ4192CzKADd47d6WBc3e2TFzWIcMscZtLiXQ1gkfiHj19OsAkiw271+jChXFWV1nF p63jozyDC0PIbhyhoC34QO3ZCx//WPV9b64OKIhLq/aScq7ZJhS9swz90JUc+NliSyCA +WxTmTSh2tEEYvy//PkDe8DffLR4vMmxoOw/4fjr1tlfPRjLCNd7j8D+CAUz1tZ5ebJp jqbNHIV+bjTuz86IlYTl4pm+P4wC4H50lvwOsOvPuLo8ysWoIDokIEAKmSCkd8Iy1YfS 8JNA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=message-id:to:from:cc:in-reply-to:subject:date:x-gm-message-state :from:to:cc:subject:date:message-id:reply-to; bh=QiuzZ5eE76511TiIltgznnd+Ml7n+JGZ4WUr2TKDhik=; b=aYS4uv+yUblvdJX0oja+tUVVSv+q5mjlpsn0fS5ypkHmfm4PPufr+B+edAgsF1/SSV YoZUA4rY4hILWQZcPRg1R2qfjQOO/CMLmJhmNZnK6bJt9LUxSc5hKYxq1HtMAArzz354 jVyIrmP9dZ/jL5U3Neh6oldslfaYvY75Lkevlbik7xsBj8heikW9pyuDJZoSd8OBOMQu 3/zioA25Z5H60MgpidaPcH3m5SA8jFa7vrIjdhCtGlwkMhTVq7uI9Z0DMzHiRTICdXTa mSbS9y9JwMlt7K5nu/v0xybSMcZaN2JQi1C1KaF2w83AXliLchwWQDQxScGp1U7UYpWn BinQ== X-Gm-Message-State: ANoB5plouAdLZyOBwOKlKXYfgqiUNIQpV33kV7DYB3VLVMFiMh2c2deD q2F21nbPp278kJZWPhm189dI3x2nZS6QKg== X-Google-Smtp-Source: AA0mqf5LbENZ/ryR0SHSRIjgC/VPlh4273PuVm1ovbqO/JrFbRwTkc9X+cK7G8ZHj9O9z1/TWvd8VQ== X-Received: by 2002:a17:90a:e2c2:b0:218:825e:17f8 with SMTP id fr2-20020a17090ae2c200b00218825e17f8mr53344549pjb.129.1669690877301; Mon, 28 Nov 2022 19:01:17 -0800 (PST) Received: from localhost ([50.221.140.188]) by smtp.gmail.com with ESMTPSA id w28-20020aa79a1c000000b005754106e364sm2226610pfj.199.2022.11.28.19.01.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Nov 2022 19:01:16 -0800 (PST) Date: Mon, 28 Nov 2022 19:01:16 -0800 (PST) X-Google-Original-Date: Mon, 28 Nov 2022 19:00:54 PST (-0800) Subject: Re: [REVIEW ONLY 1/3] RISC-V: Add "XUN@S" operand type In-Reply-To: <0187562c00ee6c8ba82439bd61e46a1899b9f916.1669684988.git.research_trasio@irq.a4lg.com> CC: research_trasio@irq.a4lg.com, binutils@sourceware.org From: Palmer Dabbelt To: binutils@sourceware.org Message-ID: X-Spam-Status: No, score=-11.0 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Mon, 28 Nov 2022 17:23:57 PST (-0800), binutils@sourceware.org wrote: > From: Tsukasa OI > > This is a variant of operand type "XuN@S" but when disassembling, it's > printed as a hexadecimal number. > > The author intends to use this operand type on: > > - Shift amount operands on 'P'-extension proposal's shift instructions > (to make them consistent with regular shift instructions) > - Landing pad label operand on the 'Zisslpcfi' extension proposal > (because they allow three different precision of landing pad label > [9, 17 and 25-bits] with up to three likely consecutive instructions > with 9, 8 and 8-bit immediates respectively, printing them as binary- > based will fit better to these instructions) > > gas/ChangeLog: > > * config/tc-riscv.c (validate_riscv_insn, riscv_ip): Add new > operand type and its handling. > > opcodes/ChangeLog: > > * riscv-dis.c (print_insn_args): Print new operand type value > as a hexadecimal number. > --- > gas/config/tc-riscv.c | 2 ++ > opcodes/riscv-dis.c | 9 ++++++--- > 2 files changed, 8 insertions(+), 3 deletions(-) > > diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c > index 0682eb355241..b58b7bc0cb05 100644 > --- a/gas/config/tc-riscv.c > +++ b/gas/config/tc-riscv.c > @@ -1399,6 +1399,7 @@ validate_riscv_insn (const struct riscv_opcode *opc, int length) > case 's': /* 'XsN@S' ... N-bit signed immediate at bit S. */ > goto use_imm; > case 'u': /* 'XuN@S' ... N-bit unsigned immediate at bit S. */ > + case 'U': /* 'XUN@S' ... same but disassembled as hex. */ > goto use_imm; > use_imm: > n = strtol (oparg + 1, (char **)&oparg, 10); > @@ -3437,6 +3438,7 @@ riscv_ip (char *str, struct riscv_cl_insn *ip, expressionS *imm_expr, > sign = true; > goto parse_imm; > case 'u': /* 'XuN@S' ... N-bit unsigned immediate at bit S. */ > + case 'U': /* 'XUN@S' ... same but disassembled as hex. */ > sign = false; > goto parse_imm; > parse_imm: > diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c > index 0e1f3b4610aa..b3127dccb3e0 100644 > --- a/opcodes/riscv-dis.c > +++ b/opcodes/riscv-dis.c > @@ -587,8 +587,9 @@ print_insn_args (const char *oparg, insn_t l, bfd_vma pc, disassemble_info *info > size_t n; > size_t s; > bool sign; > + char opch = *++oparg; > > - switch (*++oparg) > + switch (opch) > { > case 'l': /* Literal. */ > oparg++; > @@ -603,6 +604,7 @@ print_insn_args (const char *oparg, insn_t l, bfd_vma pc, disassemble_info *info > sign = true; > goto print_imm; > case 'u': /* 'XuN@S' ... N-bit unsigned immediate at bit S. */ > + case 'U': /* 'XUN@S' ... same but disassembled as hex. */ > sign = false; > goto print_imm; > print_imm: > @@ -613,8 +615,9 @@ print_insn_args (const char *oparg, insn_t l, bfd_vma pc, disassemble_info *info > oparg--; > > if (!sign) > - print (info->stream, dis_style_immediate, "%lu", > - (unsigned long)EXTRACT_U_IMM (n, s, l)); > + print (info->stream, dis_style_immediate, > + opch == 'U' ? "0x%lx" : "%lu", > + (unsigned long) EXTRACT_U_IMM (n, s, l)); > else > print (info->stream, dis_style_immediate, "%li", > (signed long)EXTRACT_S_IMM (n, s, l)); IMO we're being way too complicated with the immediate formats here. That was even true for the T-Head stuff, but this is worse. If the ISA folks want to pretend they're not adding new instruction encoding formats that's their decision, but they are in practice so let's just treat them that way. I was going to do that for the T-Head stuff, but after doing the sscanf cleanups to make it work I got lazy. Those got dropped, though, so maybe it's time to just do this right?