From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pg1-x52b.google.com (mail-pg1-x52b.google.com [IPv6:2607:f8b0:4864:20::52b]) by sourceware.org (Postfix) with ESMTPS id B34393858C53 for ; Fri, 1 Apr 2022 03:33:05 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org B34393858C53 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=dabbelt.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=dabbelt.com Received: by mail-pg1-x52b.google.com with SMTP id t13so1372297pgn.8 for ; Thu, 31 Mar 2022 20:33:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=dabbelt-com.20210112.gappssmtp.com; s=20210112; h=date:subject:in-reply-to:cc:from:to:message-id:mime-version :content-transfer-encoding; bh=rFEkzoTJJoV2nfsTiM4xmJZzba457tZeRCI4aaXfxus=; b=NJkbPilj/8Pg1Uzcf3mfq+h3uVECwCQ5NH8/aGGXWtbgULXZGONGqMHJwLY2/EykbM RVz47XrrghkAK3Sh3C88ls5AMS0Os5lxh0uh0uPDfMBMbmR/pPVt9eTT8K7aKTTgVD1c w10s3bjmZ9lgGCu3s0dEyATCL0RSYizBmI/BBNx1PSQM+rdDtcnE8nTSk5Wxh+4SB7/E BwvDs1cSWG6rvy+hodkr5T9OaoHrAdqsG+UqRoTO7J3HWclay54vCLCihovghm3AIVOS 65WqlZ07VPpt0OOHVe3JcZItvInD3vepT8KKNtV9BddCXkOx2XT3JdeoVQAZ7qV09a7h SVQA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:subject:in-reply-to:cc:from:to:message-id :mime-version:content-transfer-encoding; bh=rFEkzoTJJoV2nfsTiM4xmJZzba457tZeRCI4aaXfxus=; b=pC0p0F2mKl/JaqMPJ4rHAmfD3mBUpWN9E2MwOjVk7LomT4nNwcuhT2mqaJ/KHlHY85 a3GYtY9vF3oWUIBKxuXebPwhdTgCdh2kes03UwABpw6BGpzNSOVBk/SjxMe5pR2NilB0 KRDG28FWrkqkyeCIsYvTOQdTkXPbtt0Dx07zdgBuD2bnLUF2DCHZQfSsthWbZv02A6eM RgUKq4Xx5UneaIj9aTGmJ3OW11706IsS36kkr7IujDA7Rgofy7hSarz1ETtPEZpa8S6H 98MfjEhiASZ++1S+h4wb3trenm8GSA2yorbKU3KVFIgRdubFDgxL4kgrmjdxAtN16GBh 0mOg== X-Gm-Message-State: AOAM530wHqhpEZQuPYvNEKPBEqMtXUe60PM1sxb5H9KZy48EXEp+wAOF FVK7rI9s+t4EwxK6/xfl3sUx6ZXX6mWRAw== X-Google-Smtp-Source: ABdhPJxhf9Lo6XLMWF3tnr0woasXTGycB30Q8w1zNZC2foIcr7ftHL5AG6crjuSPDvQdS+aw2rA81Q== X-Received: by 2002:a63:10c:0:b0:36c:6dd0:44af with SMTP id 12-20020a63010c000000b0036c6dd044afmr13029215pgb.41.1648783984634; Thu, 31 Mar 2022 20:33:04 -0700 (PDT) Received: from localhost (76-210-143-223.lightspeed.sntcca.sbcglobal.net. [76.210.143.223]) by smtp.gmail.com with ESMTPSA id my18-20020a17090b4c9200b001c75aeac7fdsm11458375pjb.27.2022.03.31.20.33.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 31 Mar 2022 20:33:03 -0700 (PDT) Date: Thu, 31 Mar 2022 20:33:03 -0700 (PDT) X-Google-Original-Date: Thu, 31 Mar 2022 20:33:01 PDT (-0700) Subject: Re: [PATCH 0/5] RISC-V: Add Ratified Cache Management Operation ISA Extensions (with paren) In-Reply-To: CC: research_trasio@irq.a4lg.com, binutils@sourceware.org From: Palmer Dabbelt To: binutils@sourceware.org Message-ID: Mime-Version: 1.0 (MHng) Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-5.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 01 Apr 2022 03:33:08 -0000 On Tue, 08 Feb 2022 18:29:27 PST (-0800), binutils@sourceware.org wrote: > This patchset is a modified version of: > > > GitHub: > (original; 2021-12-16, rebased) > (new: 2022-02-09) > > > There seems a discussion to change operand of cbo.* instructions on: > . Looks like that still hasn't been resolved? I don't really care either way, just that whatever we do is in agreement with the spec as it'd be silly to differ from LLVM here. > I have a little preference for old one but it's not bad to have both > options (as complete patchsets). > > Note that however, the original patchset is *NOT OUTDATED* yet. > It implements Zicbom/Zicboz instruction like: > > cbo.zero a0 > > This new patchset implements Zicbom/Zicboz instructions like: > > cbo.zero (a0) > cbo.zero 0(a0) # only zero is allowed There's some precedent for accepting both flavors of instructions like that, so if there's already an assembler out there that does things one way and the spec does the other I guess we could accept both? I'd still prefer to just have everyone agree on the specification side, though. > Actually, my first attempt to implement cbo.* instructions used the same > format as *new* patchset (I modified before submitting the first > patchset for compliance to the specification document). > > This version requires extra checking (0(a0) actually allows > EXPRESSION_RESULTS_IN_ZERO(a0)) so I added a few extra tests. > It will also reject operand format in older patchset. > > Old patchset and new patchset are mutually exclusive and should follow > the conclusion of the discussion above. > > Thanks, > Tsukasa > > > > > Tsukasa OI (5): > RISC-V: Add mininal support for Zicbo[mpz] > RISC-V: Cache management instructions > RISC-V: Cache management instruction testcases > RISC-V: Prefetch hint instructions and operand set > RISC-V: Prefetch hint instruction testcases > > bfd/elfxx-riscv.c | 9 +++++++++ > gas/config/tc-riscv.c | 18 ++++++++++++++++++ > gas/testsuite/gas/riscv/zicbom-fail.d | 3 +++ > gas/testsuite/gas/riscv/zicbom-fail.l | 7 +++++++ > gas/testsuite/gas/riscv/zicbom-fail.s | 7 +++++++ > gas/testsuite/gas/riscv/zicbom.d | 15 +++++++++++++++ > gas/testsuite/gas/riscv/zicbom.s | 7 +++++++ > gas/testsuite/gas/riscv/zicbop-fail.d | 3 +++ > gas/testsuite/gas/riscv/zicbop-fail.l | 4 ++++ > gas/testsuite/gas/riscv/zicbop-fail.s | 4 ++++ > gas/testsuite/gas/riscv/zicbop.d | 12 ++++++++++++ > gas/testsuite/gas/riscv/zicbop.s | 4 ++++ > gas/testsuite/gas/riscv/zicboz-fail.d | 3 +++ > gas/testsuite/gas/riscv/zicboz-fail.l | 3 +++ > gas/testsuite/gas/riscv/zicboz-fail.s | 3 +++ > gas/testsuite/gas/riscv/zicboz.d | 12 ++++++++++++ > gas/testsuite/gas/riscv/zicboz.s | 4 ++++ > include/opcode/riscv-opc.h | 16 ++++++++++++++++ > include/opcode/riscv.h | 3 +++ > opcodes/riscv-dis.c | 4 ++++ > opcodes/riscv-opc.c | 9 +++++++++ > 21 files changed, 150 insertions(+) > create mode 100644 gas/testsuite/gas/riscv/zicbom-fail.d > create mode 100644 gas/testsuite/gas/riscv/zicbom-fail.l > create mode 100644 gas/testsuite/gas/riscv/zicbom-fail.s > create mode 100644 gas/testsuite/gas/riscv/zicbom.d > create mode 100644 gas/testsuite/gas/riscv/zicbom.s > create mode 100644 gas/testsuite/gas/riscv/zicbop-fail.d > create mode 100644 gas/testsuite/gas/riscv/zicbop-fail.l > create mode 100644 gas/testsuite/gas/riscv/zicbop-fail.s > create mode 100644 gas/testsuite/gas/riscv/zicbop.d > create mode 100644 gas/testsuite/gas/riscv/zicbop.s > create mode 100644 gas/testsuite/gas/riscv/zicboz-fail.d > create mode 100644 gas/testsuite/gas/riscv/zicboz-fail.l > create mode 100644 gas/testsuite/gas/riscv/zicboz-fail.s > create mode 100644 gas/testsuite/gas/riscv/zicboz.d > create mode 100644 gas/testsuite/gas/riscv/zicboz.s > > > base-commit: a37603c43f8da7983ed53b567ea30ce66066daa2