From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pl1-x62c.google.com (mail-pl1-x62c.google.com [IPv6:2607:f8b0:4864:20::62c]) by sourceware.org (Postfix) with ESMTPS id F09413858D37 for ; Thu, 27 Jul 2023 21:08:58 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org F09413858D37 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivosinc.com Received: by mail-pl1-x62c.google.com with SMTP id d9443c01a7336-1bbc87ded50so9200085ad.1 for ; Thu, 27 Jul 2023 14:08:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20221208.gappssmtp.com; s=20221208; t=1690492137; x=1691096937; h=content-transfer-encoding:mime-version:message-id:to:from:cc :in-reply-to:subject:date:from:to:cc:subject:date:message-id :reply-to; bh=ecXqD+jPXoThdNhBNO6TcbyPEISIP6ug/NNiQpV9580=; b=2CKQMZ+KcZXkMp3f0nkKfv91dV4kW09COX2y9kSkDBp1PdFGTzvPnSNLWwvxaS170m LKyxzPGPUKCmDPPNBUEuL0WDp1+Sqqb14Y9+tEkiHKI/+xWPGABq2iODUW3nUA2JwjH7 Q9WIlamQWJQtj7P7AQbdnWZri5eK7HHDI5U+nduBkXiKJVdibYlfPUd1quQWeJPg8zPZ ix7+pJfniTzaFySKBiX/Tr7lVShN3EgH576o3RqvqpZOz32U9WJ0j65cJXQdoR8vq+JZ XU6YARTIjO9r2sOds37FjvK7PnG0TVtnszArbZofoDZtmTORbUuvMkSiCw1qUMIveNxH yRew== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690492137; x=1691096937; h=content-transfer-encoding:mime-version:message-id:to:from:cc :in-reply-to:subject:date:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=ecXqD+jPXoThdNhBNO6TcbyPEISIP6ug/NNiQpV9580=; b=NrvvWQGJYF3gP2yGt8kdNvz5w3u4Z5BiCqvZxu+YBvkuWrxMsarQN0fIGNfZBg1eyg KQx6sHblIBgf4rfFTzxOgFdj9prms2psqbRM0kC0qbHEhkuvnNX/ZShsbNeAQRYteGm1 Mmf/ttpro3rgbq2gMQXxQ0zdlLaIcKmfsikfl9yTULmaSPYyKyg6wQUFdtf7dLoNFpQc Lc3jMTZXkseFZlY2yKyH29breJ/xvRMXldu6SWzNho9sGeMS/o+fNbpcRlAow7Y8f7m4 tp6lmrSxzQ7X2trYRiWO0uzaOh5PHJlCpbibFRCAuHThGuG8swJ1cwPIbyIZwF5bcWBf VcIQ== X-Gm-Message-State: ABy/qLbxsvnkmjCcQFwNpbnLI1YlVSyYEMsF3f+9ahEKuAHYJsoF0T3j W40RrZnBWi2A7zC88zUpXSVTLbAtiQIfhGEWJL0= X-Google-Smtp-Source: APBJJlERNr48a0P3j79n6r+yndvXoeGnI1PSw4Wyq9KVNkOlT6TCuOFTNiHTVpw1QG1m/CT6tvj0Wg== X-Received: by 2002:a17:903:1cd:b0:1b8:b442:aa97 with SMTP id e13-20020a17090301cd00b001b8b442aa97mr420161plh.54.1690492137494; Thu, 27 Jul 2023 14:08:57 -0700 (PDT) Received: from localhost ([135.180.227.0]) by smtp.gmail.com with ESMTPSA id jh17-20020a170903329100b001b9dfa946b4sm2092150plb.49.2023.07.27.14.08.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Jul 2023 14:08:56 -0700 (PDT) Date: Thu, 27 Jul 2023 14:08:56 -0700 (PDT) X-Google-Original-Date: Thu, 27 Jul 2023 14:08:55 PDT (-0700) Subject: Re: [PATCH] RISC-V: Do not gp relax against an ABS symbol if it is far away. In-Reply-To: CC: binutils@sourceware.org, nelson@rivosinc.com From: Palmer Dabbelt To: Joseph.Faulls@imgtec.com Message-ID: Mime-Version: 1.0 (MHng) Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-11.0 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Thu, 27 Jul 2023 09:48:24 PDT (-0700), Joseph.Faulls@imgtec.com wrote: > Relaxations can cause the gp to move after it has been decided to gp > relax. Against an absolute symbol, the distance may change such that the > offset can no longer fit in the 12-bit immediate field. > > bfd/ > * elfnn-riscv.c (_bfd_riscv_relax_pc) Do not gp relax against and ABS > symbol if it is far away. > ld/ > * ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp: Updated. > * ld/testsuite/ld-riscv-elf/gp-relax-abs*: New testcases. > --- > bfd/elfnn-riscv.c | 12 ++++++++++++ > ld/testsuite/ld-riscv-elf/gp-relax-abs-sym.s | 3 +++ > ld/testsuite/ld-riscv-elf/gp-relax-abs.d | 14 ++++++++++++++ > ld/testsuite/ld-riscv-elf/gp-relax-abs.s | 5 +++++ > ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp | 1 + > 5 files changed, 35 insertions(+) > create mode 100644 ld/testsuite/ld-riscv-elf/gp-relax-abs-sym.s > create mode 100644 ld/testsuite/ld-riscv-elf/gp-relax-abs.d > create mode 100644 ld/testsuite/ld-riscv-elf/gp-relax-abs.s > > diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c > index 09aa7be225e..79e29e8b272 100644 > --- a/bfd/elfnn-riscv.c > +++ b/bfd/elfnn-riscv.c > @@ -4885,6 +4885,18 @@ _bfd_riscv_relax_pc (bfd *abfd ATTRIBUTE_UNUSED, > max_alignment = _bfd_riscv_get_max_alignment (sec, gp); > htab->max_alignment_for_gp = max_alignment; > } > + /* If the symbol is in the abs section, relaxation could cause the gp > + * to move such that the gp relocation is no longer possible. I'm not quite sure what you mean by GP moving -- GP's the register, so it doesn't have a value until runtime. GP is meant to equal __global_pointer$, but that's usually a data symbol and thus doesn't move as a result of relaxation. We do have some other issues related to SHN_ABS (for example position independent vs PC relative stuff), so it's possible there's some other bug here? > + * Conservatively half the allowed distance, as it cannot be that > + * gp moves more than this, i.e. more than half the instructions be > + * deleted due to relaxation. Do this by adjusting reserve_size. */ > + if (sym_sec->output_section == bfd_abs_section_ptr) > + { > + if (symval >= gp) > + reserve_size += (symval - gp) / 2; > + else > + reserve_size += (gp - symval) / 2; We can have more than a factor of two from relaxation, for example from alignment. If a hueristic is all we can do then I guess we'll have to live with it, but I think I'd want to understand the movement > + } > } > } > > diff --git a/ld/testsuite/ld-riscv-elf/gp-relax-abs-sym.s b/ld/testsuite/ld-riscv-elf/gp-relax-abs-sym.s > new file mode 100644 > index 00000000000..a018bb3a50a > --- /dev/null > +++ b/ld/testsuite/ld-riscv-elf/gp-relax-abs-sym.s > @@ -0,0 +1,3 @@ > +.section .data > +.globl sym > +.set sym,0x10804 > diff --git a/ld/testsuite/ld-riscv-elf/gp-relax-abs.d b/ld/testsuite/ld-riscv-elf/gp-relax-abs.d > new file mode 100644 > index 00000000000..2c7ab3a2579 > --- /dev/null > +++ b/ld/testsuite/ld-riscv-elf/gp-relax-abs.d > @@ -0,0 +1,14 @@ > +#source: gp-relax-abs.s > +#source: gp-relax-abs-sym.s > +#as: -march=rv64ic -mabi=lp64 > +#ld: -Tcode-model-01.ld -melf64lriscv > +#objdump: -d > + > +.*:[ ]+file format .* > + > +Disassembly of section \.text: > + > +[0-9a-f]+ <_start>: > +.*auipc.* > +.*lw.*# [0-9a-f]* > +#pass > diff --git a/ld/testsuite/ld-riscv-elf/gp-relax-abs.s b/ld/testsuite/ld-riscv-elf/gp-relax-abs.s > new file mode 100644 > index 00000000000..db2103bafd1 > --- /dev/null > +++ b/ld/testsuite/ld-riscv-elf/gp-relax-abs.s > @@ -0,0 +1,5 @@ > +.text > +.global _start > +_start: > + auipc t0, %pcrel_hi(sym) > + lw t0, %pcrel_lo(_start)(t0) > diff --git a/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp b/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp > index 947a266ba72..a53a2758991 100644 > --- a/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp > +++ b/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp > @@ -172,6 +172,7 @@ if [istarget "riscv*-*-*"] { > run_dump_test "attr-merge-priv-spec-failed-06" > run_dump_test "attr-phdr" > run_dump_test "relax-max-align-gp" > + run_dump_test "gp-relax-abs" > run_dump_test "uleb128" > run_ld_link_tests [list \ > [list "Weak reference 32" "-T weakref.ld -m[riscv_choose_ilp32_emul]" "" \