From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pf1-x432.google.com (mail-pf1-x432.google.com [IPv6:2607:f8b0:4864:20::432]) by sourceware.org (Postfix) with ESMTPS id 23E323858C53 for ; Fri, 25 Aug 2023 13:23:23 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 23E323858C53 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=dabbelt.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=dabbelt.com Received: by mail-pf1-x432.google.com with SMTP id d2e1a72fcca58-68a529e1974so741122b3a.3 for ; Fri, 25 Aug 2023 06:23:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=dabbelt-com.20221208.gappssmtp.com; s=20221208; t=1692969802; x=1693574602; h=content-transfer-encoding:mime-version:message-id:to:from:cc :in-reply-to:subject:date:from:to:cc:subject:date:message-id :reply-to; bh=GEB7BnG8vpgGRhmR7v0gWqRN7vd1TWjG5mcuoi/h3rc=; b=OcFaXT/W8XVntfuszOOP14lVYfEJom6OFTvtJFHX7CjqYBbWilg2FtFxiGIAame/kC fZfqeQ1JpuyFehZ23AkdMBeX8AsCwq1ZcXSrwmg0BH3W8HUgqN9BTq/ax3IJBXc1s+37 L8zf0AVl5f7aHfiYSW9EcX8SWPktlq5LSvquKlqPCC/pjFSK52XwXGB5jQYUXX8EzTB2 BPwO+ejb+6JVhPAXftfdiW4Mg50yt7dW0QnHzwZEL//kei11yqEtgf2rG4WyaidsqVG4 UcFbhaX8m2VJiZtrM0i8pGNBRui3c3ublpXBJGLwrcjmD9/qrY5Ex1lFcodKjz4Oy8hh c45Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1692969802; x=1693574602; h=content-transfer-encoding:mime-version:message-id:to:from:cc :in-reply-to:subject:date:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=GEB7BnG8vpgGRhmR7v0gWqRN7vd1TWjG5mcuoi/h3rc=; b=gR23R+44uPXor/mFUpmMPSSRwZELBj7DYd7DYixjzVC5CJrhW/5HM+555aqrP8V5sE 6LHgwas+vHDcmE+xBEjiGS4iUh9Hr0x9D4ASrtoWbtDgEgQnSjwi3xNcZGDPPP5h+4xz y0B6V1LyvdU2nsq/onGMurUoSLHzHiSz3wCWR0mAvEcpwVJ7WonkSrSJVwpTHAspYeHw ojWjdWU7m/03gKhUtaY3aVHAtjYgtpmUViSL4nzmDPGdB1B93ZEFvYkN0CMkjQuG9DTR yAG/kjvjfwadqrV8svj4TLDFqEA7DEKLNcLb+T+FCfvRTDmBxO8CWmGCLZw7nJX74TDH l8BA== X-Gm-Message-State: AOJu0YzYo/VsoEfjjhZnvifyKkFu68gfUpBP9SMnkCHVCd6eflQwTWF0 36C3maXze8ioAvoIePa5oCeZLQ== X-Google-Smtp-Source: AGHT+IHbnJqbFW/TkfZJiu/C79BkJGUQ3dGNHDweQ5JdjP+dCMoww10uYwvsXt9ATwC9KD7l41Hn8w== X-Received: by 2002:a05:6a00:1747:b0:68a:4984:d0a8 with SMTP id j7-20020a056a00174700b0068a4984d0a8mr15765263pfc.22.1692969802065; Fri, 25 Aug 2023 06:23:22 -0700 (PDT) Received: from localhost ([135.180.227.0]) by smtp.gmail.com with ESMTPSA id b6-20020aa78706000000b0068a13b0b300sm1587635pfo.11.2023.08.25.06.23.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Aug 2023 06:23:21 -0700 (PDT) Date: Fri, 25 Aug 2023 06:23:21 -0700 (PDT) X-Google-Original-Date: Fri, 25 Aug 2023 06:23:15 PDT (-0700) Subject: Re: [PATCH] RISC-V: move various alias entries In-Reply-To: <2d277339-6428-4197-6951-4698ede1edef@suse.com> CC: Andrew Waterman , Jim Wilson , binutils@sourceware.org, research_trasio@irq.a4lg.com From: Palmer Dabbelt To: jbeulich@suse.com, nelson@rivosinc.com Message-ID: Mime-Version: 1.0 (MHng) Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-3.8 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Fri, 25 Aug 2023 06:01:07 PDT (-0700), jbeulich@suse.com wrote: > On 05.08.2023 03:40, Tsukasa OI wrote: >> On 2023/08/04 21:00, Jan Beulich via Binutils wrote: >>> For disassembly to only use spec-mandated aliases, respective non-alias >>> entries need to come ahead of their alias ones. Since identical >>> mnemonics need to stay together, whole groups are moved up where >>> necessary. >>> >>> This partly reverts 839189bc932e ("RISC-V: re-arrange opcode table for >>> consistent alias handling"), but then also goes beyond a plain revert. >>> --- >>> I did not adjust JAL back, to continue to match JALR. The spec doesn't >>> spell out how operands are to be specified, and hence it also doesn't >>> mention how many explicit ones there are supposed to be. >>> >>> What about NEG, NEGW, and RET (and perhaps more)? The spec doesn't know >>> of those afaics. >> >> I think JAL, NEG, NEGW and RET are okay as is. >> >> For JAL, I support Jan's opinion. >> >> For all instructions Jan pointed out (including JAL with one operand), >> they are listed in the RISC-V Assembly Programmer's Manual: >> >> and should be considered safe >> (unlike "add rd, rs1, IMM" == "addi rd, rs1, IMM"). IMO that's a reasonable rationale. The various RISC-V specs define things in surprising places all the time, but users already need to deal with that and there's really nothing we can do to change it. At least this way we're generating disassembly that is defined somewhere, so there's a better chance they'll be able to figue out what the mnemonics mean. >> I support merging this patch without modification (or perhaps, with >> minor modification to the commit message?). >> >> Reviewed-by: Tsukasa OI > > Arch maintainers - any view? I guess I'll wait another week or so and > commit if I don't hear anything to the contrary. Sorry for missing this. It looks good to me, so Reviewed-by: Palmer Dabbelt but I remember talking about it at some point with Nelson. It's the weekend already in Taiwain, so I'll try to remember to bug him on Monday if he doesn't see this. > > Jan