From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 487EE3858D37 for ; Mon, 10 Oct 2022 10:25:07 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 487EE3858D37 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2DC7C1570; Mon, 10 Oct 2022 03:25:13 -0700 (PDT) Received: from localhost (e121540-lin.manchester.arm.com [10.32.98.62]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id DDD1A3F792; Mon, 10 Oct 2022 03:25:05 -0700 (PDT) From: Richard Sandiford To: "dongbo \(E\)" Mail-Followup-To: "dongbo \(E\)" ,Shaokun Zhang via Binutils , Shaokun Zhang , Jingtao Cai , "Richard Earnshaw" , Marcus Shawcroft , "Jan Beulich" , richard.sandiford@arm.com Cc: Shaokun Zhang via Binutils , Shaokun Zhang , Jingtao Cai , "Richard Earnshaw" , Marcus Shawcroft , "Jan Beulich" Subject: Re: [PATCH RESEND v2] Aarch64: Allow explicit size specifier for predicate operand of {sq, uq, }{incp, decp} References: <20220216005311.26184-1-zhangshaokun@hisilicon.com> Date: Mon, 10 Oct 2022 11:25:04 +0100 In-Reply-To: (dongbo's message of "Sun, 9 Oct 2022 09:31:43 +0800") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (gnu/linux) MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="=-=-=" X-Spam-Status: No, score=-43.1 required=5.0 tests=BAYES_00,BODY_8BITS,GIT_PATCH_0,KAM_DMARC_NONE,KAM_DMARC_STATUS,KAM_LAZY_DOMAIN_SECURITY,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_NONE,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: --=-=-= Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: base64 ImRvbmdibyAoRSkiIDxkb25nYm80QGh1YXdlaS5jb20+IHdyaXRlczoNCj4gSGksIFJpY2hhcmQu DQo+DQo+IE9uIDIwMjIvOS8zMCAyMjo1NCwgUmljaGFyZCBTYW5kaWZvcmQgd3JvdGU6DQo+PiAi ZG9uZ2JvIChFKSIgPGRvbmdibzRAaHVhd2VpLmNvbT4gd3JpdGVzOg0KPj4+DQo+Pj4gV2UgdHJp ZWQgdG8gcHV0IGBTX0hgIGluIGZyb250IG9mIGBOSUxgOg0KPj4+DQo+Pj4gYGBgDQo+Pj4NCj4+ PiAgIMKgwqDCoCAjZGVmaW5lIE9QX1NWRV9Wdl9IU0TCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDC oMKgwqDCoMKgwqDCoMKgwqDCoMKgIFwNCj4+PiB7wqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDC oMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKg wqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoCBcDQo+Pj4gICDCoMKgwqAg wqAgUUxGMihTX0gsU19IKSzCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKg wqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoCBcDQo+Pj4gICDCoMKgwqAgwqAgUUxG MihTX1MsU19TKSzCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKg wqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgIFwNCj4+PiAgIMKgwqDCoCDCoCBRTEYyKFNf RCxTX0QpLMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKg wqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgIFwNCj4+PiAgIMKgwqDCoCDCoCBRTEYyKFNfSCxOSUwp LMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKg wqDCoMKgwqDCoMKgwqDCoMKgwqAgXA0KPj4+ICAgwqDCoMKgIMKgIFFMRjIoU19TLE5JTCkswqDC oMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKg wqDCoMKgwqDCoMKgwqDCoCBcDQo+Pj4gICDCoMKgwqAgwqAgUUxGMihTX0QsTklMKSzCoMKgwqDC oMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKg wqDCoMKgwqDCoMKgIFwNCj4+PiAgIMKgwqDCoCB9DQo+Pj4NCj4+PiBgYGANCj4+IFllYWgsIGdv b2QgcG9pbnQuICBJdCBzaG91bGQgYmUgaW4gdGhpcyBvcmRlciwgbGlrZSB5b3Ugc2F5Lg0KPj4N Cj4+IFRoZSBmaXhlcyB5b3UgbWVudGlvbiBsb29rIGNvcnJlY3QgdG8gbWUuDQo+Pg0KPj4+IEJ1 dCBhc3NlbWJsZXIgd2lsbCBmYWlsIGluIGBtYXRjaF9vcGVyYW5kc19xdWFsaWZpZXJgIDooLg0K Pj4+DQo+Pj4gYGBgDQo+Pj4NCj4+PiAgIMKgwqDCoCBtYXRjaF9vcGVyYW5kc19xdWFsaWZpZXIg KGFhcmNoNjRfaW5zdCAqaW5zdCwgYm9vbCB1cGRhdGVfcCkNCj4+PiAgIMKgwqDCoCB7DQo+Pj4g ICDCoMKgwqAgwqDCoMKgIC4uLg0KPj4+ICAgwqDCoMKgIMKgwqDCoCBpZiAoIWFhcmNoNjRfZmlu ZF9iZXN0X21hdGNoICguLi4pKQ0KPj4+ICAgwqDCoMKgIMKgwqDCoCAuLi4NCj4+PiAgIMKgwqDC oCDCoMKgwqAgaWYgKGluc3QtPm9wY29kZS0+ZmxhZ3MgJiBGX1NUUklDVCkNCj4+PiAgIMKgwqDC oCDCoMKgwqAgew0KPj4+ICAgwqDCoMKgIMKgwqDCoCDCoMKgwqAgLyogUmVxdWlyZSBhbiBleGFj dCBxdWFsaWZpZXIgbWF0Y2gsIGV2ZW4gZm9yIE5JTA0KPj4+IHF1YWxpZmllcnMuwqAgKi8NCj4+ PiAgIMKgwqDCoCDCoMKgwqAgwqDCoMKgIG5vcHMgPSBhYXJjaDY0X251bV9vZl9vcGVyYW5kcyAo aW5zdC0+b3Bjb2RlKTsNCj4+PiAgIMKgwqDCoCDCoMKgwqAgwqDCoMKgIGZvciAoaSA9IDA7IGkg PCBub3BzOyArK2kpDQo+Pj4gICDCoMKgwqAgwqDCoMKgIMKgwqDCoCDCoMKgwqAgaWYgKGluc3Qt Pm9wZXJhbmRzW2ldLnF1YWxpZmllciAhPSBxdWFsaWZpZXJzW2ldKQ0KPj4+ICAgwqDCoMKgIMKg wqDCoCDCoMKgwqAgwqDCoMKgIMKgwqDCoCByZXR1cm4gZmFsc2U7DQo+Pj4gICDCoMKgwqAgwqDC oMKgIH0NCj4+PiAgIMKgwqDCoCB9DQo+Pj4NCj4+PiBgYGANCj4+IEkgdGhpbmsgdGhhdCdzIGEg bWlzZmVhdHVyZSBvZiB0aGUgRl9TVFJJQ1QgaGFuZGxpbmcuICBEb2VzIGl0IHdvcmsNCj4+IHdp dGggdGhlIHBhdGNoIGJlbG93Pw0KPg0KPiBXZSBjYW5ub3QgZmluZCB0aGUgYHRyZWUtZGF0YS1y ZWYuY2NgIGluIGJpbnV0aWxzLCBpdCBpcyBhIGZpbGUgaW4gR0NDPw0KPg0KPiBJcyBgMDAwMS1k YXRhLXJlZi1GaXgtcmFuZ2VzX21heWJlX292ZXJsYXBfcC10ZXN0LnBhdGNoYCB0aGUgcGF0Y2gg eW91IA0KPiBtZWFudCB0byBzZW5kPw0KDQpHYWgsIG5vLCBzb3JyeS4NCg0KPiBXZSBhbHNvIGZv dW5kIGEgd2F5IHRvIGZpeCB0aGUgRl9TVFJJQ1QgbWF0Y2hpbmcgZmFpbHVyZS4gU2VlIHBhdGNo IA0KPiBiZWxvdy4gOikNCj4NCj4gVGhlIG1haW4gcG9pbnQgaXMgdG8gZ2l2ZSBhbm90aGVyIGBm aW5kX2Jlc3RfbWF0Y2hgIHRyeSB3aGVuIHdlIGdldCBhIA0KPiBxdWFsaWZpZXIgbWlzbWF0Y2gg Zm9yIEhTRCBvcGVyYW5kcy4NCg0KSSB0aGluayBpdCdzIHNpbXBsZXIgdGhhbiB0aGF0LiAgSGVy ZSdzIHRoZSBwYXRjaCBJIG1lYW50IHRvIHNlbmQNCih3aGljaCBpcyBtb3JlIC1zIHRoYW4gK3Mp Lg0KDQpSaWNoYXJkDQoNCg== --=-=-= Content-Type: text/x-diff Content-Disposition: inline; filename=0001-aarch64-Tweak-handling-of-F_STRICT.patch >From f33351e591b3e1caed2611e4c2e5f7b470150fa7 Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Fri, 30 Sep 2022 12:34:59 +0100 Subject: [PATCH] aarch64: Tweak handling of F_STRICT To: binutils@sourceware.org Current F_STRICT qualifier checking is enforced after the fact rather than as part of the match. This makes it impossible to have, e.g.: QLF2(S_D, S_D) QLF2(S_D, NIL) in the same list. opcodes/ * aarch64-opc.c (aarch64_find_best_match): Handle F_STRICT here rather than... (match_operands_qualifier): ...here. --- opcodes/aarch64-opc.c | 25 ++++++++----------------- 1 file changed, 8 insertions(+), 17 deletions(-) diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c index 1d4668a3fbd..a2882bdfaba 100644 --- a/opcodes/aarch64-opc.c +++ b/opcodes/aarch64-opc.c @@ -958,19 +958,19 @@ aarch64_find_best_match (const aarch64_inst *inst, dump_match_qualifiers (inst->operands, qualifiers); #endif - /* Most opcodes has much fewer patterns in the list. - First NIL qualifier indicates the end in the list. */ - if (empty_qualifier_sequence_p (qualifiers)) + /* The first entry should be taken literally, even if it's an empty + qualifier sequence. (This matters for strict testing.) In other + positions an empty sequence acts as a terminator. */ + if (i > 0 && empty_qualifier_sequence_p (qualifiers)) { - DEBUG_TRACE_IF (i == 0, "SUCCEED: empty qualifier list"); - if (i) - found = 0; + found = 0; break; } for (j = 0; j < num_opnds && j <= stop_at; ++j, ++qualifiers) { - if (inst->operands[j].qualifier == AARCH64_OPND_QLF_NIL) + if (inst->operands[j].qualifier == AARCH64_OPND_QLF_NIL + && !(inst->opcode->flags & F_STRICT)) { /* Either the operand does not have qualifier, or the qualifier for the operand needs to be deduced from the qualifier @@ -1038,7 +1038,7 @@ aarch64_find_best_match (const aarch64_inst *inst, static int match_operands_qualifier (aarch64_inst *inst, bool update_p) { - int i, nops; + int i; aarch64_opnd_qualifier_seq_t qualifiers; if (!aarch64_find_best_match (inst, inst->opcode->qualifiers_list, -1, @@ -1048,15 +1048,6 @@ match_operands_qualifier (aarch64_inst *inst, bool update_p) return 0; } - if (inst->opcode->flags & F_STRICT) - { - /* Require an exact qualifier match, even for NIL qualifiers. */ - nops = aarch64_num_of_operands (inst->opcode); - for (i = 0; i < nops; ++i) - if (inst->operands[i].qualifier != qualifiers[i]) - return false; - } - /* Update the qualifiers. */ if (update_p) for (i = 0; i < AARCH64_MAX_OPND_NUM; ++i) -- 2.25.1 --=-=-=--