From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 3C15F3857829 for ; Tue, 30 Nov 2021 13:19:37 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 3C15F3857829 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0F9EF1042; Tue, 30 Nov 2021 05:19:37 -0800 (PST) Received: from localhost (unknown [10.32.98.88]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 8E9883F5A1; Tue, 30 Nov 2021 05:19:36 -0800 (PST) From: Richard Sandiford To: binutils@sourceware.org Mail-Followup-To: binutils@sourceware.org, rearnsha@arm.com, richard.sandiford@arm.com Cc: rearnsha@arm.com Subject: [PATCH 05/10] aarch64: Add id_aa64isar2_el1 Date: Tue, 30 Nov 2021 13:19:35 +0000 Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_NUMSUBJECT, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 30 Nov 2021 13:19:39 -0000 Armv8.8-A defines a read-only system register called id_aa64isar2_el1. The register was previously RES0 and should therefore be accepted at all architecture levels. [https://developer.arm.com/documentation/ddi0595/2021-09/AArch64-Registers/ID-AA64ISAR2-EL1--AArch64-Instruction-Set-Attribute-Register-2?lang=en] Tested on aarch64-linux-gnu. OK to install? Richard opcodes/ * aarch64-opc.c (aarch64_sys_regs): Add id_aa64isar2_el1. gas/ * testsuite/gas/aarch64/sysreg-diagnostic.s: Test writes to id_aa64isar2_el1. * testsuite/gas/aarch64/sysreg-diagnostic.d: Update accordingly. * testsuite/gas/aarch64/sysreg-diagnostic.l: Likewise. * testsuite/gas/aarch64/sysreg.s: Test reads from id_aa64isar2_el1. * testsuite/gas/aarch64/sysreg.d: Update accordingly. --- gas/testsuite/gas/aarch64/sysreg-diagnostic.d | 1 + gas/testsuite/gas/aarch64/sysreg-diagnostic.l | 1 + gas/testsuite/gas/aarch64/sysreg-diagnostic.s | 1 + gas/testsuite/gas/aarch64/sysreg.d | 2 ++ gas/testsuite/gas/aarch64/sysreg.s | 3 +++ opcodes/aarch64-opc.c | 1 + 6 files changed, 9 insertions(+) diff --git a/gas/testsuite/gas/aarch64/sysreg-diagnostic.d b/gas/testsuite/gas/aarch64/sysreg-diagnostic.d index fb39db20d2b..7059fbe3c8e 100644 --- a/gas/testsuite/gas/aarch64/sysreg-diagnostic.d +++ b/gas/testsuite/gas/aarch64/sysreg-diagnostic.d @@ -12,3 +12,4 @@ Disassembly of section \.text: .*: d5330503 mrs x3, dbgdtrrx_el0 .*: d5330503 mrs x3, dbgdtrrx_el0 .*: d5180003 msr midr_el1, x3 // note: writing to a read-only register +.*: d5180640 msr id_aa64isar2_el1, x0 // note: writing to a read-only register diff --git a/gas/testsuite/gas/aarch64/sysreg-diagnostic.l b/gas/testsuite/gas/aarch64/sysreg-diagnostic.l index 4566652dc6c..e9a41a2a3d2 100644 --- a/gas/testsuite/gas/aarch64/sysreg-diagnostic.l +++ b/gas/testsuite/gas/aarch64/sysreg-diagnostic.l @@ -2,3 +2,4 @@ .*:3: Warning: specified register cannot be written to at operand 1 -- `msr dbgdtrrx_el0,x3' .*:5: Warning: specified register cannot be read from at operand 2 -- `mrs x3,dbgdtrtx_el0' .*:6: Warning: specified register cannot be written to at operand 1 -- `msr midr_el1,x3' +.*:7: Warning: specified register cannot be written to at operand 1 -- `msr id_aa64isar2_el1,x0' diff --git a/gas/testsuite/gas/aarch64/sysreg-diagnostic.s b/gas/testsuite/gas/aarch64/sysreg-diagnostic.s index 5f68fe60bdc..a689cdceae5 100644 --- a/gas/testsuite/gas/aarch64/sysreg-diagnostic.s +++ b/gas/testsuite/gas/aarch64/sysreg-diagnostic.s @@ -4,3 +4,4 @@ mrs x3, dbgdtrrx_el0 mrs x3, dbgdtrtx_el0 msr midr_el1, x3 + msr id_aa64isar2_el1, x0 diff --git a/gas/testsuite/gas/aarch64/sysreg.d b/gas/testsuite/gas/aarch64/sysreg.d index 5da20c99847..704666d48c8 100644 --- a/gas/testsuite/gas/aarch64/sysreg.d +++ b/gas/testsuite/gas/aarch64/sysreg.d @@ -29,3 +29,5 @@ Disassembly of section \.text: 54: d5184b00 msr s3_0_c4_c11_0, x0 58: d5310300 mrs x0, trcstatr 5c: d5110300 msr trcstatr, x0 + 60: d5380640 mrs x0, id_aa64isar2_el1 + 64: d538065e mrs x30, id_aa64isar2_el1 diff --git a/gas/testsuite/gas/aarch64/sysreg.s b/gas/testsuite/gas/aarch64/sysreg.s index fa797284f23..f2e75a863a1 100644 --- a/gas/testsuite/gas/aarch64/sysreg.s +++ b/gas/testsuite/gas/aarch64/sysreg.s @@ -30,3 +30,6 @@ mrs x0, s2_1_c0_c3_0 msr s2_1_c0_c3_0, x0 + + mrs x0, id_aa64isar2_el1 + mrs x30, id_aa64isar2_el1 diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c index 289df9e8848..9b7d7efd437 100644 --- a/opcodes/aarch64-opc.c +++ b/opcodes/aarch64-opc.c @@ -4082,6 +4082,7 @@ const aarch64_sys_reg aarch64_sys_regs [] = SR_CORE ("id_aa64dfr1_el1", CPENC (3,0,C0,C5,1), F_REG_READ), SR_CORE ("id_aa64isar0_el1", CPENC (3,0,C0,C6,0), F_REG_READ), SR_CORE ("id_aa64isar1_el1", CPENC (3,0,C0,C6,1), F_REG_READ), + SR_CORE ("id_aa64isar2_el1", CPENC (3,0,C0,C6,2), F_REG_READ), SR_CORE ("id_aa64mmfr0_el1", CPENC (3,0,C0,C7,0), F_REG_READ), SR_CORE ("id_aa64mmfr1_el1", CPENC (3,0,C0,C7,1), F_REG_READ), SR_CORE ("id_aa64mmfr2_el1", CPENC (3,0,C0,C7,2), F_REG_READ), -- 2.25.1