From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 0B8DE3857C64 for ; Tue, 30 Nov 2021 13:19:00 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 0B8DE3857C64 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id CF3901042; Tue, 30 Nov 2021 05:18:59 -0800 (PST) Received: from localhost (unknown [10.32.98.88]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 59FE53F5A1; Tue, 30 Nov 2021 05:18:59 -0800 (PST) From: Richard Sandiford To: binutils@sourceware.org Mail-Followup-To: binutils@sourceware.org, rearnsha@arm.com, richard.sandiford@arm.com Cc: rearnsha@arm.com Subject: [PATCH 04/10] aarch64: Add support for Armv8.8-A Date: Tue, 30 Nov 2021 13:18:58 +0000 Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-Spam-Status: No, score=-12.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 30 Nov 2021 13:19:01 -0000 This patch adds skeleton support for -march=armv8.8-a, testing only that it correctly inherits from armv8.7-a. Tested on aarch64-linux-gnu. OK to install? Richard include/ * opcode/aarch64.h (AARCH64_FEATURE_V8_8): New macro. (AARCH64_ARCH_V8_8): Likewise. gas/ * doc/c-aarch64.texi: Document armv8.8-a. * config/tc-aarch64.c (aarch64_archs): Add armv8-8-a * testsuite/gas/aarch64/v8-8-a.s, * testsuite/gas/aarch64/v8-8-a.d: New test. --- gas/config/tc-aarch64.c | 1 + gas/doc/c-aarch64.texi | 4 ++-- gas/testsuite/gas/aarch64/v8-8-a.d | 2 ++ gas/testsuite/gas/aarch64/v8-8-a.s | 5 +++++ include/opcode/aarch64.h | 3 +++ 5 files changed, 13 insertions(+), 2 deletions(-) create mode 100644 gas/testsuite/gas/aarch64/v8-8-a.d create mode 100644 gas/testsuite/gas/aarch64/v8-8-a.s diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index 497c126ea83..2181fa12bfd 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -9820,6 +9820,7 @@ static const struct aarch64_arch_option_table aarch64_archs[] = { {"armv8.5-a", AARCH64_ARCH_V8_5}, {"armv8.6-a", AARCH64_ARCH_V8_6}, {"armv8.7-a", AARCH64_ARCH_V8_7}, + {"armv8.8-a", AARCH64_ARCH_V8_8}, {"armv8-r", AARCH64_ARCH_V8_R}, {"armv9-a", AARCH64_ARCH_V9}, {NULL, AARCH64_ARCH_NONE} diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi index 6c399636266..3051b6f6d76 100644 --- a/gas/doc/c-aarch64.texi +++ b/gas/doc/c-aarch64.texi @@ -110,8 +110,8 @@ issue an error message if an attempt is made to assemble an instruction which will not execute on the target architecture. The following architecture names are recognized: @code{armv8-a}, @code{armv8.1-a}, @code{armv8.2-a}, @code{armv8.3-a}, @code{armv8.4-a} -@code{armv8.5-a}, @code{armv8.6-a}, @code{armv8.7-a}, @code{armv8-r}, and -@code{armv9-a}. +@code{armv8.5-a}, @code{armv8.6-a}, @code{armv8.7-a}, @code{armv8.8-a}, +@code{armv8-r}, and @code{armv9-a}. If both @option{-mcpu} and @option{-march} are specified, the assembler will use the setting for @option{-mcpu}. If neither are diff --git a/gas/testsuite/gas/aarch64/v8-8-a.d b/gas/testsuite/gas/aarch64/v8-8-a.d new file mode 100644 index 00000000000..50fb822e5a6 --- /dev/null +++ b/gas/testsuite/gas/aarch64/v8-8-a.d @@ -0,0 +1,2 @@ +# objdump: -dr +#... diff --git a/gas/testsuite/gas/aarch64/v8-8-a.s b/gas/testsuite/gas/aarch64/v8-8-a.s new file mode 100644 index 00000000000..f2568ef922b --- /dev/null +++ b/gas/testsuite/gas/aarch64/v8-8-a.s @@ -0,0 +1,5 @@ + .arch armv8.8-a + + ld64b x0, [x1] + dsb oshnxs + msr hcrx_el2, x0 diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index fa79aa9c25a..493b7973f1c 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -94,6 +94,7 @@ typedef uint32_t aarch64_insn; #define AARCH64_FEATURE_V9 (1ULL << 56) /* Armv9.0-A processors. */ #define AARCH64_FEATURE_SME_F64 (1ULL << 57) /* SME F64. */ #define AARCH64_FEATURE_SME_I64 (1ULL << 58) /* SME I64. */ +#define AARCH64_FEATURE_V8_8 (1ULL << 59) /* Armv8.8 processors. */ /* Crypto instructions are the combination of AES and SHA2. */ #define AARCH64_FEATURE_CRYPTO (AARCH64_FEATURE_SHA2 | AARCH64_FEATURE_AES) @@ -141,6 +142,8 @@ typedef uint32_t aarch64_insn; #define AARCH64_ARCH_V8_7 AARCH64_FEATURE (AARCH64_ARCH_V8_6, \ AARCH64_FEATURE_V8_7 \ | AARCH64_FEATURE_LS64) +#define AARCH64_ARCH_V8_8 AARCH64_FEATURE (AARCH64_ARCH_V8_7, \ + AARCH64_FEATURE_V8_8) #define AARCH64_ARCH_V8_R (AARCH64_FEATURE (AARCH64_ARCH_V8_4, \ AARCH64_FEATURE_V8_R) \ & ~(AARCH64_FEATURE_V8_A | AARCH64_FEATURE_LOR)) -- 2.25.1