From: Andreas Schwab <schwab@suse.de>
To: Rui Ueyama via Binutils <binutils@sourceware.org>
Cc: Nelson Chu <nelson@rivosinc.com>, Rui Ueyama <rui314@gmail.com>,
Rui Ueyama <ruiu@bluewhale.systems>
Subject: Re: [PATCH v2] RISC-V: emit R_RISCV_RELAX for the la pseudo instruction
Date: Tue, 12 Dec 2023 10:25:15 +0100 [thread overview]
Message-ID: <mvmo7evpybo.fsf@suse.de> (raw)
In-Reply-To: <20230920083124.2072273-1-ruiu@bluewhale.systems> (Rui Ueyama via Binutils's message of "Wed, 20 Sep 2023 17:31:26 +0900")
On Sep 20 2023, Rui Ueyama via Binutils wrote:
> @@ -4049,6 +4057,13 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
> break;
>
> case BFD_RELOC_RISCV_GOT_HI20:
> + /* R_RISCV_GOT_HI20 and the following R_RISCV_LO12_I are relaxable
> + only if it is created as a result of la or lga assembler macros. */
> + if (fixP->tc_fix_data.source_macro == M_LA ||
> + fixP->tc_fix_data.source_macro == M_LGA)
Line break before the operator, not after.
--
Andreas Schwab, SUSE Labs, schwab@suse.de
GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7
"And now for something completely different."
prev parent reply other threads:[~2023-12-12 9:25 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-19 7:01 [PATCH] " Rui Ueyama
2023-09-20 1:08 ` Nelson Chu
2023-09-20 8:31 ` [PATCH v2] " Rui Ueyama
2023-09-21 0:18 ` Nelson Chu
2023-09-21 5:32 ` Rui Ueyama
2023-09-21 7:37 ` Nelson Chu
2023-12-12 6:40 ` Rui Ueyama
2023-12-12 9:38 ` Nelson Chu
2023-12-12 9:25 ` Andreas Schwab [this message]
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