From: Richard Sandiford <rsandifo@redhat.com>
To: binutils@sources.redhat.com
Subject: Rework MIPS nop-insertion code, add -mfix-vr4130 [3/11]
Date: Tue, 08 Mar 2005 14:46:00 -0000 [thread overview]
Message-ID: <wvnwtsici0y.fsf_-_@talisman.cambridge.redhat.com> (raw)
In-Reply-To: <wvn1xaqdwrs.fsf@talisman.cambridge.redhat.com> (Richard Sandiford's message of "Tue, 08 Mar 2005 14:42:31 +0000")
Three of the old prev_insn properties -- prev_insn_valid,
prev_insn_delay_slot and prev_insn_extended -- were only used to detect
cases where a previous instruction could not be used to fill a delay slot.
As far as the rest of these patches are concerned, it would be much easier
if we just had a single flag to say "this instruction cannot be moved".
Tested on mips64{,el}-linux-gnu and mipsisa64{,el}-elf. OK to install?
Richard
* config/tc-mips.c (mips_cl_insn): Replace valid_p, delay_slot_p
and extended_p fields with a single fixed_p field.
(append_insn, mips_no_prev_insn): Adjust accordingly.
diff -urpN gas.3/config/tc-mips.c gas/config/tc-mips.c
--- gas.3/config/tc-mips.c 2005-03-08 10:04:27.514029340 +0000
+++ gas/config/tc-mips.c 2005-03-08 10:12:01.923312861 +0000
@@ -146,19 +146,12 @@ struct mips_cl_insn
/* The relocs associated with the instruction, if any. */
fixS *fixp[3];
- /* True if this entry describes a real instruction. */
- unsigned int valid_p : 1;
+ /* True if this entry cannot be moved from its current position. */
+ unsigned int fixed_p : 1;
/* True if this instruction occured in a .set noreorder block. */
unsigned int noreorder_p : 1;
- /* True if this instruction corresponds to an assembler-filled
- delay slot. Always false if noreorder_p. */
- unsigned int delay_slot_p : 1;
-
- /* True for extended mips16 instructions. */
- unsigned int extended_p : 1;
-
/* True for mips16 instructions that jump to an absolute address. */
unsigned int mips16_absolute_jump_p : 1;
};
@@ -2357,12 +2350,9 @@ append_insn (struct mips_cl_insn *ip, ex
/* If we had to emit any NOP instructions, then we
already know we can not swap. */
|| nops != 0
- /* If we don't even know the previous insn, we can not
- swap. */
- || ! history[0].valid_p
- /* If the previous insn is already in a branch delay
- slot, then we can not swap. */
- || history[0].delay_slot_p
+ /* We can't swap if the previous instruction's position
+ is fixed. */
+ || history[0].fixed_p
/* If the previous previous insn was in a .set
noreorder, we can't swap. Actually, the MIPS
assembler will swap in this situation. However, gcc
@@ -2374,11 +2364,7 @@ append_insn (struct mips_cl_insn *ip, ex
bne $4,$0,foo
in which we can not swap the bne and INSN. If gcc is
not configured -with-gnu-as, it does not output the
- .set pseudo-ops. We don't have to check
- history[0].noreorder_p, because history[0].valid_p will
- be 0 in that case. We don't want to use
- history[1].valid_p, because we do want to be able
- to swap at the start of a function. */
+ .set pseudo-ops. */
|| history[1].noreorder_p
/* If the branch is itself the target of a branch, we
can not swap. We cheat on this; all we check for is
@@ -2542,9 +2528,6 @@ append_insn (struct mips_cl_insn *ip, ex
swap. */
|| (mips_opts.mips16
&& (prev_pinfo & MIPS16_INSN_READ_PC))
- /* If the previous instruction was extended, we can not
- swap. */
- || (mips_opts.mips16 && history[0].extended_p)
/* If the previous instruction had a fixup in mips16
mode, we can not swap. This normally means that the
previous instruction was a 4 byte branch anyhow. */
@@ -2700,7 +2683,7 @@ append_insn (struct mips_cl_insn *ip, ex
history[1].extend = ip->extend;
history[1].insn_opcode = ip->insn_opcode;
}
- history[0].delay_slot_p = 1;
+ history[0].fixed_p = 1;
/* If that was an unconditional branch, forget the previous
insn information. */
@@ -2714,7 +2697,6 @@ append_insn (struct mips_cl_insn *ip, ex
history[0].fixp[1] = NULL;
history[0].fixp[2] = NULL;
history[0].mips16_absolute_jump_p = 0;
- history[0].extended_p = 0;
}
else if (pinfo & INSN_COND_BRANCH_LIKELY)
{
@@ -2733,8 +2715,7 @@ append_insn (struct mips_cl_insn *ip, ex
history[0].fixp[1] = NULL;
history[0].fixp[2] = NULL;
history[0].mips16_absolute_jump_p = 0;
- history[0].extended_p = 0;
- history[0].delay_slot_p = 1;
+ history[0].fixed_p = 1;
}
else
{
@@ -2752,27 +2733,20 @@ append_insn (struct mips_cl_insn *ip, ex
history[0].use_extend = ip->use_extend;
history[0].extend = ip->extend;
history[0].insn_opcode = ip->insn_opcode;
-
- /* Any time we see a branch, we always fill the delay slot
- immediately; since this insn is not a branch, we know it
- is not in a delay slot. */
- history[0].delay_slot_p = 0;
-
+ history[0].fixed_p = (mips_opts.mips16
+ && (ip->use_extend
+ || *reloc_type > BFD_RELOC_UNUSED));
history[0].fixp[0] = fixp[0];
history[0].fixp[1] = fixp[1];
history[0].fixp[2] = fixp[2];
history[0].mips16_absolute_jump_p = (reloc_type[0]
== BFD_RELOC_MIPS16_JMP);
- if (mips_opts.mips16)
- history[0].extended_p = (ip->use_extend
- || *reloc_type > BFD_RELOC_UNUSED);
}
history[1].noreorder_p = history[0].noreorder_p;
history[0].noreorder_p = 0;
history[0].frag = frag_now;
history[0].where = f - frag_now->fr_literal;
- history[0].valid_p = 1;
}
else if (mips_relax.sequence != 2)
{
@@ -2791,6 +2765,7 @@ append_insn (struct mips_cl_insn *ip, ex
== BFD_RELOC_MIPS16_JMP);
history[1].noreorder_p = history[0].noreorder_p;
history[0].noreorder_p = 1;
+ history[0].fixed_p = 1;
}
/* We just output an insn, so the next one doesn't have a label. */
@@ -2813,10 +2788,8 @@ mips_no_prev_insn (int preserve)
prev_nop_frag_required = 0;
prev_nop_frag_since = 0;
}
- history[0].valid_p = 0;
- history[0].delay_slot_p = 0;
+ history[0].fixed_p = 1;
history[0].noreorder_p = 0;
- history[0].extended_p = 0;
history[0].mips16_absolute_jump_p = 0;
history[1].noreorder_p = 0;
mips_clear_insn_labels ();
next prev parent reply other threads:[~2005-03-08 14:46 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-03-08 14:39 Rework MIPS nop-insertion code, add -mfix-vr4130 [1/11] Richard Sandiford
2005-03-08 14:42 ` Rework MIPS nop-insertion code, add -mfix-vr4130 [2/11] Richard Sandiford
2005-03-08 14:46 ` Richard Sandiford [this message]
2005-03-08 14:50 ` Rework MIPS nop-insertion code, add -mfix-vr4130 [4/11] Richard Sandiford
2005-03-08 14:56 ` Rework MIPS nop-insertion code, add -mfix-vr4130 [5/11] Richard Sandiford
2005-03-08 15:00 ` Rework MIPS nop-insertion code, add -mfix-vr4130 [6/11] Richard Sandiford
2005-03-08 15:05 ` Rework MIPS nop-insertion code, add -mfix-vr4130 [7/11] Richard Sandiford
2005-03-08 15:06 ` Rework MIPS nop-insertion code, add -mfix-vr4130 [8/11] Richard Sandiford
2005-03-08 15:10 ` Rework MIPS nop-insertion code, add -mfix-vr4130 [9/11] Richard Sandiford
2005-03-08 15:12 ` Rework MIPS nop-insertion code, add -mfix-vr4130 [10/11] Richard Sandiford
2005-03-08 15:16 ` Rework MIPS nop-insertion code, add -mfix-vr4130 [11/11] Richard Sandiford
2005-03-08 19:45 ` Eric Christopher
2005-03-08 19:43 ` Rework MIPS nop-insertion code, add -mfix-vr4130 [10/11] Eric Christopher
2005-03-08 19:42 ` Rework MIPS nop-insertion code, add -mfix-vr4130 [9/11] Eric Christopher
2005-03-08 19:19 ` Rework MIPS nop-insertion code, add -mfix-vr4130 [8/11] Eric Christopher
2005-03-08 19:18 ` Rework MIPS nop-insertion code, add -mfix-vr4130 [7/11] Eric Christopher
2005-03-09 9:55 ` Richard Sandiford
2005-03-08 19:12 ` Rework MIPS nop-insertion code, add -mfix-vr4130 [6/11] Eric Christopher
2005-03-08 19:12 ` Rework MIPS nop-insertion code, add -mfix-vr4130 [5/11] Eric Christopher
2005-03-08 19:09 ` Rework MIPS nop-insertion code, add -mfix-vr4130 [4/11] Eric Christopher
2005-03-08 19:08 ` Rework MIPS nop-insertion code, add -mfix-vr4130 [3/11] Eric Christopher
2005-03-08 19:07 ` Rework MIPS nop-insertion code, add -mfix-vr4130 [2/11] Eric Christopher
2005-03-08 19:06 ` Rework MIPS nop-insertion code, add -mfix-vr4130 [1/11] Eric Christopher
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