From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 28229 invoked by alias); 17 Jul 2002 00:21:35 -0000 Mailing-List: contact binutils-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: binutils-owner@sources.redhat.com Received: (qmail 28216 invoked from network); 17 Jul 2002 00:21:34 -0000 Received: from unknown (HELO mms2.broadcom.com) (63.70.210.59) by sources.redhat.com with SMTP; 17 Jul 2002 00:21:34 -0000 Received: from 63.70.210.1 by mms2.broadcom.com with ESMTP (Broadcom MMS-2 SMTP Relay (MMS v4.7)); Tue, 16 Jul 2002 17:19:37 -0700 X-Server-Uuid: 2a12fa22-b688-11d4-a6a1-00508bfc9626 Received: from mail-sj1-5.sj.broadcom.com (mail-sj1-5.sj.broadcom.com [10.16.128.236]) by mon-irva-11.broadcom.com (8.9.1/8.9.1) with ESMTP id RAA21426; Tue, 16 Jul 2002 17:21:33 -0700 (PDT) Received: from dt-sj3-118.sj.broadcom.com (dt-sj3-118 [10.21.64.118]) by mail-sj1-5.sj.broadcom.com (8.12.4/8.12.4/SSF) with ESMTP id g6H0LXER010921; Tue, 16 Jul 2002 17:21:33 -0700 (PDT) Received: (from cgd@localhost) by dt-sj3-118.sj.broadcom.com ( 8.9.1/SJ8.9.1) id RAA14901; Tue, 16 Jul 2002 17:21:31 -0700 (PDT) To: ica2_ts@csv.ica.uni-stuttgart.de cc: rsandifo@redhat.com, gcc-patches@gcc.gnu.org, binutils@sources.redhat.com Subject: Re: RFC & patch: Rework MIPS command-line handling References: <20020714172200.GH19894@rembrandt.csv.ica.uni-stuttgart.de> <20020715182149.GB16056@rembrandt.csv.ica.uni-stuttgart.de> From: cgd@broadcom.com Date: Tue, 16 Jul 2002 17:24:00 -0000 In-Reply-To: ica2_ts@csv.ica.uni-stuttgart.de's message of "Mon, 15 Jul 2002 18:22:39 +0000 (UTC)" Message-ID: MIME-Version: 1.0 X-WSS-ID: 112A6793251686-01-01 Content-Type: text/plain Content-Transfer-Encoding: 7bit X-SW-Source: 2002-07/txt/msg00388.txt.bz2 At Mon, 15 Jul 2002 18:22:39 +0000 (UTC), "Thiemo Seufer" wrote: > > If the CPU aliases for the ISA aren't the minimal set for the ISA, > > that sounds like a very good reason for somebody to go off and do > > something better, i.e., create "actual ISA" definitions. > > > > I believe that at least mipsisa32 and mipsisa64 -- ISAs which are > > really ISAs in the code, rather than being CPUs -- are correct. 8-) > > Are the CP0 and TLB instructions really covered by the ISA there? I have never actually seen a complete and canonical MIPS ISA definition pre-dating MIPS32/MIPS64. > > And, in that view, -mabi=foo probably shouldn't change the ISA (and > > definitely shouldn't downgrade it). > > My idea is to get sane defaults from the ABI definition. > > gcc -mabi=FOO > > should create ABI conformant code, while > > gcc -mabi=FOO -march=BAR > > loosens the ABI restrictions in order to allow BAR opcodes. > AFAICS this fulfils the "least surprise" priciple for hosted > systems, and the embedded world can live with it, too. Since I'm a bit behind on this discussion, I'll just have to risk reiterating points already made in response to your msg by others: That may be appropriate for "mips-linux" tools. It's probably not appropriate for "mipsisa32-linux" tools, since somebody configured the tools naming a specific architecture that they wanted to build for by default. cgd