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* src/cgen ChangeLog sid.scm cpu/arm.sim arm.sim
@ 2001-07-05  5:54 bje
  0 siblings, 0 replies; only message in thread
From: bje @ 2001-07-05  5:54 UTC (permalink / raw)
  To: cgen-cvs

CVSROOT:	/cvs/src
Module name:	src
Changes by:	bje@sources.redhat.com	2001-07-05 05:54:37

Modified files:
	cgen           : ChangeLog sid.scm 
Added files:
	cgen/cpu       : arm.sim 
Removed files:
	cgen           : arm.sim 

Log message:
	2001-07-05  Ben Elliston  <bje@redhat.com>
	
	* sid.scm (sim-finish!): Read .sim files from srcdir/cpu.

Patches:
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/cgen/ChangeLog.diff?cvsroot=src&r1=1.70&r2=1.71
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/cgen/sid.scm.diff?cvsroot=src&r1=1.4&r2=1.5
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/cgen/arm.sim.diff?cvsroot=src&r1=1.1.1.1&r2=NONE
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/cgen/cpu/arm.sim.diff?cvsroot=src&r1=NONE&r2=1.1


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