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From: bje@sources.redhat.com
To: cgen-cvs@sources.redhat.com
Subject: src/cgen ChangeLog cpu/m32r.opc
Date: Fri, 13 Feb 2004 02:55:00 -0000 [thread overview]
Message-ID: <20040213025515.13671.qmail@sources.redhat.com> (raw)
CVSROOT: /cvs/src
Module name: src
Changes by: bje@sourceware.org 2004-02-13 02:55:15
Modified files:
cgen : ChangeLog
cgen/cpu : m32r.opc
Log message:
2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.dot.com>
* cpu/m32r.opc (my_print_insn): Fixed incorrect output when
disassembling codes for 0x*2 addresses.
Patches:
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/cgen/ChangeLog.diff?cvsroot=src&r1=1.177&r2=1.178
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/cgen/cpu/m32r.opc.diff?cvsroot=src&r1=1.4&r2=1.5
next reply other threads:[~2004-02-13 2:55 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2004-02-13 2:55 bje [this message]
2004-03-30 9:29 nickc
2005-10-14 8:33 nickc
2005-10-18 7:53 nickc
2005-10-19 14:44 nickc
2005-10-27 6:57 amodra
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