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From: bje@sources.redhat.com
To: cgen-cvs@sources.redhat.com
Subject: src/cgen ChangeLog cpu/m32r.opc
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CVSROOT:	/cvs/src
Module name:	src
Changes by:	bje@sourceware.org	2004-02-13 02:55:15

Modified files:
	cgen           : ChangeLog 
	cgen/cpu       : m32r.opc 

Log message:
	2004-02-10  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.dot.com>
	
	* cpu/m32r.opc (my_print_insn): Fixed incorrect output when
	disassembling codes for 0x*2 addresses.

Patches:
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/cgen/ChangeLog.diff?cvsroot=src&r1=1.177&r2=1.178
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/cgen/cpu/m32r.opc.diff?cvsroot=src&r1=1.4&r2=1.5