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From: devans@sourceware.org
To: cgen-cvs@sourceware.org
Subject: src/cgen ChangeLog mach.scm sim-arch.scm sim-c ...
Date: Mon, 23 Nov 2009 00:59:00 -0000 [thread overview]
Message-ID: <20091123005957.30868.qmail@sourceware.org> (raw)
CVSROOT: /cvs/src
Module name: src
Changes by: devans@sourceware.org 2009-11-23 00:59:57
Modified files:
cgen : ChangeLog mach.scm sim-arch.scm sim-cpu.scm
sim-decode.scm sim-model.scm sim.scm
Log message:
* mach.scm (<derived-arch-data>): New member large-insn-word?.
(/adata-set-derived!): Set it.
(adata-large-insn-word?): New function.
* sim-arch.scm (/gen-cpuall-includes): Don't #include cgen-engine.h
here.
* sim-cpu.scm (cgen-cpu.h): #include it here.
(/gen-cpu-defines): Define CGEN_INSN_WORD.
(/gen-no-scache-semantic-fn): Use CGEN_INSN_WORD instead of
CGEN_INSN_INT.
* sim-decode.scm (/gen-idesc-decls): Ditto.
(/gen-extract-case, /gen-decode-fn): Ditto.
* sim-model.scm (/gen-model-insn-fn): Ditto.
* sim.scm (gen-argbuf-type): Ditto.
Patches:
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/cgen/ChangeLog.diff?cvsroot=src&r1=1.429&r2=1.430
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/cgen/mach.scm.diff?cvsroot=src&r1=1.24&r2=1.25
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/cgen/sim-arch.scm.diff?cvsroot=src&r1=1.6&r2=1.7
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/cgen/sim-cpu.scm.diff?cvsroot=src&r1=1.17&r2=1.18
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/cgen/sim-decode.scm.diff?cvsroot=src&r1=1.14&r2=1.15
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/cgen/sim-model.scm.diff?cvsroot=src&r1=1.11&r2=1.12
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/cgen/sim.scm.diff?cvsroot=src&r1=1.28&r2=1.29
reply other threads:[~2009-11-23 0:59 UTC|newest]
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