From: Kazuhio Inaoka <inaoka.kazuhiro@renesas.com>
To: cgen@sources.redhat.com
Subject: Transepose Mitsubishi to Renesas for M32R processor.
Date: Tue, 22 Apr 2003 06:18:00 -0000 [thread overview]
Message-ID: <010201c30897$b13db100$2569910a@hoku.renesas.com> (raw)
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Renesas Technology Corp. is a new semiconductor company, established on
April 1st, 2003, as a joint venture between Hitachi, Ltd.(TSE: 6501) and
Mitsubishi Electric Corporation(TSE: 6503).
M32R Information:
http://www.renesas.com/eng/products/mpumcu/32bit/m32r/index.html
2003-04-22 Kazuhiro Inaoka <inaoka dot kazuhiro at renesas dot com>
* cgen/cpu/m32r.cpu : Change Mitsubishi to Renesas
cgen/doc/rtl.texi : ditto
cgen/NEWS : ditto
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diff -c org_src/src/cgen/cpu/m32r.cpu src/cgen/cpu/m32r.cpu
*** org_src/src/cgen/cpu/m32r.cpu Thu Jul 5 21:45:47 2001
--- src/cgen/cpu/m32r.cpu Tue Apr 22 15:09:51 2003
***************
*** 1,4 ****
! ; Mitsubishi M32R CPU description. -*- Scheme -*-
; Copyright (C) 2000 Red Hat, Inc.
; This file is part of CGEN.
; See file COPYING.CGEN for details.
--- 1,4 ----
! ; Renesas M32R CPU description. -*- Scheme -*-
; Copyright (C) 2000 Red Hat, Inc.
; This file is part of CGEN.
; See file COPYING.CGEN for details.
***************
*** 12,18 ****
(define-arch
(name m32r) ; name of cpu family
! (comment "Mitsubishi M32R")
(default-alignment aligned)
(insn-lsb0? #f)
(machs m32r m32rx)
--- 12,18 ----
(define-arch
(name m32r) ; name of cpu family
! (comment "Renesas M32R")
(default-alignment aligned)
(insn-lsb0? #f)
(machs m32r m32rx)
***************
*** 138,144 ****
; The "b" suffix stands for "base" and is the convention.
; The "f" suffix stands for "family" and is the convention.
(name m32rbf)
! (comment "Mitsubishi M32R base family")
(endian big)
(word-bitsize 32)
; Override isa spec (??? keeps things simpler, though it was more true
--- 138,144 ----
; The "b" suffix stands for "base" and is the convention.
; The "f" suffix stands for "family" and is the convention.
(name m32rbf)
! (comment "Renesas M32R base family")
(endian big)
(word-bitsize 32)
; Override isa spec (??? keeps things simpler, though it was more true
***************
*** 148,154 ****
(define-cpu
(name m32rxf)
! (comment "Mitsubishi M32Rx family")
(endian big)
(word-bitsize 32)
; Generated files have an "x" suffix.
--- 148,154 ----
(define-cpu
(name m32rxf)
! (comment "Renesas M32Rx family")
(endian big)
(word-bitsize 32)
; Generated files have an "x" suffix.
diff -c org_src/src/cgen/doc/rtl.texi src/cgen/doc/rtl.texi
*** org_src/src/cgen/doc/rtl.texi Sun Dec 22 13:49:26 2002
--- src/cgen/doc/rtl.texi Tue Apr 22 15:10:24 2003
***************
*** 340,346 ****
@example
(define-arch
(name architecture-name) ; e.g. m32r
! (comment "description") ; e.g. "Mitsubishi M32R"
(attrs attribute-list)
(default-alignment aligned|unaligned|forced)
(insn-lsb0? #f|#t)
--- 340,346 ----
@example
(define-arch
(name architecture-name) ; e.g. m32r
! (comment "description") ; e.g. "Renesas M32R"
(attrs attribute-list)
(default-alignment aligned|unaligned|forced)
(insn-lsb0? #f|#t)
diff -c org_src/src/cgen/NEWS src/cgen/NEWS
*** org_src/src/cgen/NEWS Fri Dec 20 11:20:50 2002
--- src/cgen/NEWS Tue Apr 22 15:11:21 2003
***************
*** 13,17 ****
* Intel i960 [incomplete]
* Intel IA-32 and IA-64 [incomplete]
* Fujitsu FR-30
! * Mitsubishi M32R/D
* SPARC [incomplete]
--- 13,17 ----
* Intel i960 [incomplete]
* Intel IA-32 and IA-64 [incomplete]
* Fujitsu FR-30
! * Renesas M32R/D
* SPARC [incomplete]
reply other threads:[~2003-04-22 6:18 UTC|newest]
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