From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 11563 invoked by alias); 21 Aug 2009 17:51:39 -0000 Received: (qmail 11548 invoked by uid 22791); 21 Aug 2009 17:51:38 -0000 X-SWARE-Spam-Status: No, hits=0.8 required=5.0 tests=AWL,BAYES_00,J_CHICKENPOX_21,URIBL_BLACK X-Spam-Check-By: sourceware.org Received: from smtp.idnet.com (HELO smtp-out.idnet.com) (212.69.36.238) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Fri, 21 Aug 2009 17:51:24 +0000 Received: from localhost (unknown [127.0.0.1]) by smtp-out.idnet.com (Postfix) with ESMTP id 689A92D71EA for ; Fri, 21 Aug 2009 17:51:21 +0000 (UTC) Received: from smtp-out.idnet.com ([127.0.0.1]) by localhost (smtp-out.idnet.com [127.0.0.1]) (amavisd-new, port 10040) with LMTP id h5taMeOmNIQw for ; Fri, 21 Aug 2009 18:51:20 +0100 (BST) Received: from mail.idnet.net.uk (mail.idnet.net.uk [212.69.36.63]) by smtp-out.idnet.com (Postfix) with ESMTP id 948352D71E6 for ; Fri, 21 Aug 2009 18:51:20 +0100 (BST) Received: from [91.135.5.64] by mail.idnet.net.uk (GMS 15.02.3689/NU3963.00.7ca42f0c) with ESMTP id lajkowba for cgen@sourceware.org; Fri, 21 Aug 2009 18:51:19 +0100 Subject: Architectures and Machine Names From: Jeremy Bennett Reply-To: jeremy.bennett@embecosm.com To: cgen@sourceware.org Content-Type: text/plain Date: Fri, 21 Aug 2009 17:51:00 -0000 Message-Id: <1250877079.10529.224.camel@thomas> Mime-Version: 1.0 Content-Transfer-Encoding: 7bit X-AuthenticatedSender: jeremy.bennett.embecosm.com@idnet.net.uk X-IsSubscribed: yes Mailing-List: contact cgen-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: cgen-owner@sourceware.org X-SW-Source: 2009-q3/txt/msg00070.txt.bz2 I'm updating the OpenRISC 1000 binutils port and CGEN specification and need some advice on defining architecture and machine. Over the years there has been some confusion over naming with the OpenRISC project. The OpenRISC 1000 is an architecture permitting various implementations (32-bit, 64-bit, big-endian, little-endian). Within this architecture there is a core instruction set (either 32 or 64-bit), and supplementary instruction sets for floating point and vector operations. Currently there is one 32-bit big-endian implementation, the OpenRISC 1200 supporting the core 32-bit instruction set So it seems natural to define the CGEN architecture as or1k, with a machine named or32 (supporting the core ISA) and a model named or1200. All in a file named or1k.cpu. Users build their binutils using --target=or32-opencores-elf. I have a BFD architecture bfd_arch_or1k and a BFD machine bfd_mach_or32. However I am struggling to get binutils to accept the idea that the machine name and architecture are different. CGEN will generate my opcodes files using the architecture (or1k-) as prefix. However GAS will set the prefix from the CPU (or32), not the CPU Type (or1k), so looks for opcodes files with a or32- prefix. I have tried overriding this in configure.in for gas by setting the prefix to match the CPU type (or1k), and binutils will build. However the ELF images created by the assembler use the machine name (or32) as the architecture, but the disassembler checks that the file matches the architecture (or1k). Thus objdump -d will not recognize files created by the assembler. Unfortunately I cannot find an example to follow within binutils of an architecture like this. The SuperH processors are specified with CGEN (sh.cpu), but not built with CGEN. All the CGEN targets in configure.in with using_cgen=yes have the same name for both architecture and machine. I'd appreciate advice on how to resolve this. Most of the OpenRISC 1000 is common to all implementations, so it makes sense to have a single "or1k" set of tools. However the user also needs to specify which CPU within the "or1k" set, to allow variations to happen. Many thanks, Jeremy -- Tel: +44 (1590) 610184 Cell: +44 (7970) 676050 SkypeID: jeremybennett Email: jeremy.bennett@embecosm.com Web: www.embecosm.com