From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ben Elliston To: lehotsky@earthlink.net Cc: cgen@sourceware.cygnus.com Subject: Re: branch-delay slot semantics questions Date: Sun, 13 May 2001 15:41:00 -0000 Message-id: <15103.3463.616529.377250@scooby.apac.redhat.com> References: <200105111205.IAA04658@iron.> X-SW-Source: 2001-q2/msg00050.html >>>>> "lehotsky" == lehotsky writes: lehotsky> Is there also any support for dealing with the semantics that lehotsky> "a branch in the delay-slot is always annulled". I think I can lehotsky> implement this by having two bits in the ISA's (setup-semantics (..)) lehotsky> code. On some architectures, certain classes of instructions are forbidden in the delay slot. If this is what you really want, it's easiest to detect this condition during instruction extraction ("fetching"). Again, see the fr30/mloop.in for an illustration. Ben