From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 15581 invoked by alias); 13 Feb 2007 19:25:05 -0000 Received: (qmail 15553 invoked by uid 22791); 13 Feb 2007 19:25:04 -0000 X-Spam-Check-By: sourceware.org Received: from mx1.transmeta.com (HELO mx1.transmeta.com) (63.209.4.221) by sourceware.org (qpsmtpd/0.31) with ESMTP; Tue, 13 Feb 2007 19:24:57 +0000 Received: from neon-gw-l3.transmeta.com (HELO neon-gw.transmeta.com) ([63.209.4.196]) by mx1.transmeta.com with ESMTP/TLS/AES256-SHA; 13 Feb 2007 11:24:54 -0800 X-IronPort-AV: i="4.14,163,1170662400"; d="scan'208"; a="2326655:sNHT22743312" Received: from victor.transmeta.com (victor.transmeta.com [10.0.2.120]) by neon-gw.transmeta.com (Postfix) with ESMTP id 14AAE5F803B; Tue, 13 Feb 2007 11:24:53 -0800 (PST) Received: from victor.transmeta.com (localhost.localdomain [127.0.0.1]) by victor.transmeta.com (Postfix) with ESMTP id 458543BF340; Tue, 13 Feb 2007 11:24:54 -0800 (PST) Received: from casey.transmeta.com (casey.transmeta.com [10.10.25.22]) by victor.transmeta.com (Postfix) with ESMTP id 381103BF33F; Tue, 13 Feb 2007 11:24:54 -0800 (PST) Received: (from dje@localhost) by casey.transmeta.com (8.11.6/8.11.6) id l1DJOrn10673; Tue, 13 Feb 2007 11:24:53 -0800 From: Doug Evans MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Message-ID: <17874.4229.806002.475024@casey.transmeta.com> Date: Tue, 13 Feb 2007 19:25:00 -0000 To: Joern Rennecke Cc: cgen@sources.redhat.com Subject: delayed branches and zero overhead loops In-Reply-To: <20070213153717.GA12710@elsdt-razorfish.arc.com> References: <20070213153717.GA12710@elsdt-razorfish.arc.com> X-Mailer: VM 6.72 under 21.1 (patch 8) "Bryce Canyon" XEmacs Lucid X-IsSubscribed: yes Mailing-List: contact cgen-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: cgen-owner@sourceware.org X-SW-Source: 2007-q1/txt/msg00039.txt.bz2 Joern Rennecke writes: > Like for delay slots, this pseudo instruction will need and extra decoded > insn slot, so again it is important to know if it is allowed to use one extra > slot. > A further problem is that I don't want to have a nonsense encoding for > the pseudo insn which could be triggered by invalid code, and/or cause decoder > conflicts. Hence, there should be a way to define instruction semantics > without an instruction encoding. > What do you think would the bets way to express this? > No format field? Treating an empty format field in a special way? > Adding a magic attribute that causes the format field (or its absence) to > be ignored? fwiw, It sounds like you want to add an application specific entry to the cpu description file. For me that's an ipso-facto wrong way to go. Having said that, I can imagine partitioning the description file into multiple files such that these pseudo-insns are only seen by the application in question. And then having said that, the degrees of freedom for how to implement this are much more open. If I were to choose from the options you suggest, and I'm not sure I would, but if I were, I'd go with something explicit. The absence of something shouldn't denote special behaviour. What if a later developer forgets to add something? Did he really forget, or is he trying to denote this special behaviour? Thus of the choices mentioned, an attribute is the preferable one. fwiw, I think the partitioning of problems into application independent and application dependent parts is fundamental to cgen. Clearly zero overhead loops are part of the architecture, but as I understand the plan of attack, it sounds like you're going for an application specific solution - what if a different simulator wants to do things differently? Thus question: Is there a way to express the zero-overhead loops in an a way that is more faithful to being just a description of the architecture, and not an application specific hack. Which leads to me next question: Is ARCompact a variant of the ARC for which I did a port ages ago? [I didn't do a simulator port for it though, I had to use the one given me.] I forget if/how it handled zero overhead loops. Can you refresh my memory? That might help in coming up with a reasonable solution.