From: Shehryar Humayun <shehryarhumayunkhan@yahoo.com>
To: Ben Elliston <bje@redhat.com>
Cc: cgen@sources.redhat.com
Subject: Problem in opcodes for ARM
Date: Fri, 06 Sep 2002 07:37:00 -0000 [thread overview]
Message-ID: <20020906143653.23838.qmail@web21208.mail.yahoo.com> (raw)
In-Reply-To: <15736.46038.217700.778062@tooth.toronto.redhat.com>
Hi,
Thanks for the tip. I am going to try that. Meanwhile,
I have tried to generate the 8 opcode files for ARM
using the same procedure I have used for m32r and
fr30. Here is what I get:
make opcodes ARCH=arm
...
Loading arm.cpu
Including simplify.inc
Including arm7.cpu
Including thumb.cpu
Analyzing Instruction Set
Done Analysis
Generating arm-opc.h
Generating arm-opc.c
Generating arm-opcinst.c
Generating arm-ibld.h
Generating arm-ibld.in
ERROR: missing operands: "(sra () WI (sub WI value
2))"
No backtrace available
make: *** [opcodes] Error 1
I have invoked CGEN using GUILE as well by writing
...
(cload #:arch "cpu/arm")
I get a "Done analysis" message, no errors in the
files it seems. Any idea what might be causing the
problem in file generation process.
Regards
Shehryar
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next prev parent reply other threads:[~2002-09-06 14:37 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2002-09-01 2:03 Next Step Shehryar Humayun
2002-09-03 7:23 ` Ben Elliston
2002-09-03 20:51 ` Shehryar Humayun
2002-09-04 11:11 ` Ben Elliston
2002-09-04 19:42 ` Shehryar Humayun
2002-09-05 2:30 ` Ben Elliston
2002-09-05 16:22 ` Shehryar Humayun
2002-09-06 6:55 ` Ben Elliston
2002-09-06 7:37 ` Shehryar Humayun [this message]
2002-09-06 9:02 ` Problem in opcodes for ARM Doug Evans
2002-09-06 11:37 ` Shehryar Humayun
2002-09-06 9:36 ` Next Step Shehryar Humayun
2002-09-06 10:03 ` Ben Elliston
2002-09-06 11:21 ` Shehryar Humayun
2002-09-06 12:07 ` Ben Elliston
2002-09-06 20:54 ` Shehryar Humayun
2002-09-09 6:27 ` Ben Elliston
2002-09-03 20:51 ` Shehryar Humayun
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