From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 12737 invoked by alias); 20 Dec 2002 22:59:12 -0000 Mailing-List: contact cgen-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: cgen-owner@sources.redhat.com Received: (qmail 12728 invoked from network); 20 Dec 2002 22:59:11 -0000 Received: from unknown (HELO mars.net-itech.com) (24.100.100.83) by 209.249.29.67 with SMTP; 20 Dec 2002 22:59:11 -0000 Received: (qmail 27208 invoked from network); 20 Dec 2002 22:58:26 -0000 Received: from unknown (HELO satori) (192.168.12.27) by mars.net-itech.com with SMTP; 20 Dec 2002 22:58:18 -0000 Content-Type: text/plain; charset="us-ascii" From: David Carney Organization: Net Integration Technologies To: cgen@sources.redhat.com Subject: variable width instructions Date: Fri, 20 Dec 2002 14:59:00 -0000 User-Agent: KMail/1.4.3 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Message-Id: <200212201757.54789.dfcarney@net-itech.com> X-SW-Source: 2002-q4/txt/msg00118.txt.bz2 I'm trying to write a .cpu file for a simple, non-pipelined (CISC) chip. T= he=20 instructions and data are all 16 bits (little endian). Defining the=20 instruction fields was relatively straight forward, until I realised that=20 instructions involving 'immediate' datum are, in fact, 32 bits... My question is: how I should go about defining the instruction fields for t= his=20 architecture? I.e. what value should I use for the "start" fields in=20 "(define-ifield ...)" for the msb so that instruction fields are compatible= =20 for both 16-bit and (the effectively) 32-bit instructions (15 or 31) ? My confusion stems from observing the line: (dnf f-i32 "32 bit immediate" (SIGN-OPT) 16 32) in fr30.cpu. Doesn't the "16 32" denote that the start of the opcode is at= =20 bit 16, but the length is 32? For my ISA I need something equivalent to=20 "start" =3D -1, "length" =3D 16. How do I go about this? Dave Carney