From: Doug Evans <dje@sebabeach.org>
To: dj@redhat.com, geoffk@geoffk.com
Cc: cgen@sources.redhat.com
Subject: opcode bits beyond base-insn-bitsize
Date: Mon, 23 Dec 2002 21:51:00 -0000 [thread overview]
Message-ID: <20021224055735.2F216B539@seba.sebabeach.org> (raw)
I found this fixme in xstormy16.cpu.
(define-isa
(name xstormy16)
(comment "Xstormy16 instruction set")
(default-insn-word-bitsize 32)
(default-insn-bitsize 32)
; FIXME base-insn-bitsize should be 16 too, but at present CGEN has
; no support for instruction sets with opcode bits past
; base-insn-bitsize, so we must set it to at least 20.
(base-insn-bitsize 32)
)
Can anyone remember what the details are?
i.e. what didn't work? assembler? disassembler? simulator?
next reply other threads:[~2002-12-24 5:51 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2002-12-23 21:51 Doug Evans [this message]
2002-12-24 9:53 ` DJ Delorie
2002-12-24 10:08 ` Doug Evans
2002-12-24 10:11 ` DJ Delorie
2002-12-24 10:27 ` Doug Evans
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