From: "Frank Ch. Eigler" <fche@redhat.com>
To: Doug Evans <dje@sebabeach.org>
Cc: cgen@sources.redhat.com
Subject: Re: sid thumb file generation error
Date: Wed, 18 Jun 2003 14:28:00 -0000 [thread overview]
Message-ID: <20030618142839.GA29128@redhat.com> (raw)
In-Reply-To: <20030618064201.23BA7B536@mail.sebabeach.org>
Hi -
> Including file thumb.cpu ...
> ERROR: ../../../../../src/sid/component/cgen-cpu/arm7t/../../../../cgen/cpu/thumb.cpu:46: define-ifield: ifield already defined::
> (f-op3)
> [...]
> For now, an easier fix is not flag an error for objects from disjoint isas.
> I'll work on this tomorrow.
A related problem was pointed out by a thumb sid user on the net a while
ago: the sid decoders were confused by the different base-insn-size for
arm vs thumb. I have been planning to fix it thusly:
Index: mach.scm
===================================================================
RCS file: /cvs/src/src/cgen/mach.scm,v
retrieving revision 1.5
diff -u -p -r1.5 mach.scm
--- mach.scm 10 Jun 2003 21:22:02 -0000 1.5
+++ mach.scm 18 Jun 2003 14:27:51 -0000
@@ -1358,9 +1358,12 @@
; All selected isas must have same value or error.
(define (state-base-insn-bitsize)
- (let ((bib (map isa-base-insn-bitsize (current-isa-list))))
- ; FIXME: ensure all have same value.
- (car bib))
+ (if (with-multiple-isa?)
+ (let ((bib (map isa-base-insn-bitsize (current-isa-list))))
+ (logit 4 "current-isa-list=" (map obj:name (current-isa-list)) " bits=" bib "\n")
+ ; FIXME: ensure all have same value.
+ (car bib))
+ (isa-base-insn-bitsize (current-isa)))
)
; Return parallel-insns spec.
- FChE
next prev parent reply other threads:[~2003-06-18 14:28 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2003-06-18 6:38 Doug Evans
2003-06-18 14:28 ` Frank Ch. Eigler [this message]
2003-07-08 16:31 ` Doug Evans
2003-07-09 19:40 ` Frank Ch. Eigler
2003-07-10 0:41 ` Doug Evans
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