From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 13435 invoked by alias); 5 Sep 2003 15:34:52 -0000 Mailing-List: contact cgen-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: cgen-owner@sources.redhat.com Received: (qmail 13207 invoked from network); 5 Sep 2003 15:34:45 -0000 Received: from unknown (HELO neon-gw.transmeta.com) (63.209.4.196) by sources.redhat.com with SMTP; 5 Sep 2003 15:34:45 -0000 Received: (from root@localhost) by neon-gw.transmeta.com (8.9.3/8.9.3) id IAA15773; Fri, 5 Sep 2003 08:34:26 -0700 Received: from mailhost.transmeta.com(10.1.1.15) by neon-gw.transmeta.com via smap (V2.1) id xma015762; Fri, 5 Sep 03 08:34:24 -0700 Received: from casey.transmeta.com (casey.transmeta.com [10.10.25.22]) by deepthought.transmeta.com (8.11.6/8.11.6) with ESMTP id h85FYP729292; Fri, 5 Sep 2003 08:34:26 -0700 (PDT) Received: (from dje@localhost) by casey.transmeta.com (8.9.3/8.7.3) id IAA17701; Fri, 5 Sep 2003 08:34:25 -0700 Date: Fri, 05 Sep 2003 15:44:00 -0000 Message-Id: <200309051534.IAA17701@casey.transmeta.com> From: Doug Evans To: gdb-patches@sources.redhat.com cc: brolley@redhat.com, fche@redhat.com, cgen@sources.redhat.com Subject: [PATCH] remove .cpu file copying X-SW-Source: 2003-q3/txt/msg00055.txt.bz2 Here is the sim patch to accompany my previously posted patch to binutils/cgen to pass the path of the .cpu file to cgen. We'll need to coordinate checking in this change with cgen. Dave, can you check this in when you're ready? (where "ready" here includes receipt of requisite approval, obviously) Or someone could give me a one-time authority to check this in ... I've included i960 because it's still in the tree. One can either not check this part in because it'll be obsoleted rsn, or check this part in. [btw, is there a plan to delete sim/i960 from the 6.0 branch?] 2003-09-05 Doug Evans common: * cgen.sh: New arg archfile. * Make-common.in (cgen-arch,cgen-cpu,cgen-defs,cgen-decode, cgen-cpu-decode,cgen-desc): Update call to cgen.sh. frv: * Makefile.in (stamp-arch,stamp-cpu): Pass archfile to cgen. Remove copying of .cpu file to cgen/cpu, no longer needed. i960: * Makefile.in (stamp-arch,stamp-cpu, stamp-desc): Pass archfile to cgen. m32r: * Makefile.in (stamp-arch,stamp-cpu,stamp-xcpu): Pass archfile to cgen. Index: common/Make-common.in =================================================================== RCS file: /cvs/src/src/sim/common/Make-common.in,v retrieving revision 1.12 diff -u -p -r1.12 Make-common.in --- common/Make-common.in 13 Apr 2003 17:45:11 -0000 1.12 +++ common/Make-common.in 5 Sep 2003 15:13:55 -0000 @@ -674,31 +674,37 @@ CGEN_FLAGS_TO_PASS = \ cgen-arch: force $(SHELL) $(srccom)/cgen.sh arch $(srcdir) \ $(CGEN) $(CGENDIR) "$(CGENFLAGS)" \ - $(arch) "$(FLAGS)" ignored "$(isa)" $(mach) ignored ignored + $(arch) "$(FLAGS)" ignored "$(isa)" $(mach) ignored \ + $(archfile) ignored cgen-cpu: force $(SHELL) $(srccom)/cgen.sh cpu $(srcdir) \ $(CGEN) $(CGENDIR) "$(CGENFLAGS)" \ - $(arch) "$(FLAGS)" $(cpu) "$(isa)" $(mach) "$(SUFFIX)" "$(EXTRAFILES)" + $(arch) "$(FLAGS)" $(cpu) "$(isa)" $(mach) "$(SUFFIX)" \ + $(archfile) "$(EXTRAFILES)" cgen-defs: force $(SHELL) $(srccom)/cgen.sh defs $(srcdir) \ $(CGEN) $(CGENDIR) "$(CGENFLAGS)" \ - $(arch) "$(FLAGS)" $(cpu) "$(isa)" $(mach) "$(SUFFIX)" ignored + $(arch) "$(FLAGS)" $(cpu) "$(isa)" $(mach) "$(SUFFIX)" \ + $(archfile) ignored cgen-decode: force $(SHELL) $(srccom)/cgen.sh decode $(srcdir) \ $(CGEN) $(CGENDIR) "$(CGENFLAGS)" \ - $(arch) "$(FLAGS)" $(cpu) "$(isa)" $(mach) "$(SUFFIX)" "$(EXTRAFILES)" + $(arch) "$(FLAGS)" $(cpu) "$(isa)" $(mach) "$(SUFFIX)" \ + $(archfile) "$(EXTRAFILES)" cgen-cpu-decode: force $(SHELL) $(srccom)/cgen.sh cpu-decode $(srcdir) \ $(CGEN) $(CGENDIR) "$(CGENFLAGS)" \ - $(arch) "$(FLAGS)" $(cpu) "$(isa)" $(mach) "$(SUFFIX)" "$(EXTRAFILES)" + $(arch) "$(FLAGS)" $(cpu) "$(isa)" $(mach) "$(SUFFIX)" \ + $(archfile) "$(EXTRAFILES)" cgen-desc: force $(SHELL) $(srccom)/cgen.sh desc $(srcdir) \ $(CGEN) $(CGENDIR) "$(CGENFLAGS)" \ - $(arch) "$(FLAGS)" $(cpu) "$(isa)" $(mach) "$(SUFFIX)" ignored + $(arch) "$(FLAGS)" $(cpu) "$(isa)" $(mach) "$(SUFFIX)" \ + $(archfile) ignored ## End COMMON_POST_CONFIG_FRAG Index: common/cgen.sh =================================================================== RCS file: /cvs/src/src/sim/common/cgen.sh,v retrieving revision 1.4 diff -u -p -r1.4 cgen.sh --- common/cgen.sh 5 Jan 2001 04:36:09 -0000 1.4 +++ common/cgen.sh 5 Sep 2003 15:13:55 -0000 @@ -3,7 +3,7 @@ # # Usage: /bin/sh cgen.sh {"arch"|"cpu"|"decode"|"defs"|"cpu-decode"} \ # srcdir cgen cgendir cgenflags \ -# arch archflags cpu mach suffix extrafiles +# arch archflags cpu mach suffix archfile extrafiles # # We store the generated files in the source directory until we decide to # ship a Scheme interpreter (or other implementation) with gdb/binutils. @@ -24,6 +24,7 @@ isa=$9 # portably bring parameters beyond $9 into view shift ; mach=$9 shift ; suffix=$9 +shift ; archfile=$9 shift ; extrafiles=$9 rootdir=${srcdir}/../.. @@ -57,7 +58,7 @@ arch) ${cgenflags} \ -f "${archflags}" \ -m ${mach} \ - -a ${arch} \ + -a ${archfile} \ -i ${isa} \ -A tmp-arch.h1 \ -B tmp-arch.c1 \ @@ -111,7 +112,7 @@ cpu | decode | cpu-decode) ${cgenflags} \ -f "${archflags}" \ -m ${mach} \ - -a ${arch} \ + -a ${archfile} \ -i ${isa} \ ${fileopts} @@ -180,7 +181,7 @@ defs) ${cgenflags} \ -f "${archflags}" \ -m ${mach} \ - -a ${arch} \ + -a ${archfile} \ -i ${isa} \ -G tmp-defs.h1 sed $sedscript < tmp-defs.h1 > tmp-defs.h @@ -197,7 +198,7 @@ desc) ${cgenflags} \ -f "${archflags}" \ -m ${mach} \ - -a ${arch} \ + -a ${archfile} \ -i ${isa} \ -H tmp-desc.h1 \ -C tmp-desc.c1 \ Index: frv/Makefile.in =================================================================== RCS file: /cvs/src/src/sim/frv/Makefile.in,v retrieving revision 1.1 diff -u -p -r1.1 Makefile.in --- frv/Makefile.in 29 Aug 2003 16:35:46 -0000 1.1 +++ frv/Makefile.in 5 Sep 2003 15:13:55 -0000 @@ -111,23 +111,19 @@ CGEN_MAINT = ; @true @CGEN_MAINT@CGEN_MAINT = stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(srcdir)/../../cpu/frv.cpu - cp -fp $(srcdir)/../../cpu/frv.cpu $(CGEN_CPU_DIR)/frv.cpu $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \ + archfile=$(srcdir)/../../cpu/frv.cpu \ FLAGS="with-scache" - rm -f $(CGEN_CPU_DIR)/frv.cpu touch stamp-arch arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch # @true -# .cpu and .opc files for frv are kept in a different directory, but cgen has no switch to specify that location, so -# copy those file to the regular place. stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srcdir)/../../cpu/frv.cpu - cp -fp $(srcdir)/../../cpu/frv.cpu $(CGEN_CPU_DIR)/frv.cpu $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ cpu=frvbf mach=frv,fr500,fr400,tomcat,simple SUFFIX= \ + archfile=$(srcdir)/../../cpu/frv.cpu \ FLAGS="with-scache with-profile=fn with-generic-write with-parallel-only" \ EXTRAFILES="$(CGEN_CPU_SEM)" - rm -f $(CGEN_CPU_DIR)/frv.cpu touch stamp-cpu cpu.h sem.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu # @true Index: i960/Makefile.in =================================================================== RCS file: /cvs/src/src/sim/i960/Makefile.in,v retrieving revision 1.4 diff -u -p -r1.4 Makefile.in --- i960/Makefile.in 5 Jul 2001 13:51:26 -0000 1.4 +++ i960/Makefile.in 5 Sep 2003 15:13:55 -0000 @@ -107,19 +107,24 @@ CGEN_MAINT = ; @true stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CGEN_CPU_DIR)/i960.cpu $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \ + archfile=$(CGEN_CPU_DIR)/i960.cpu \ FLAGS="with-scache with-profile=fn" touch stamp-arch arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/i960.cpu $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ - cpu=i960base mach=i960:ka_sa,i960:ca SUFFIX= FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)" + cpu=i960base mach=i960:ka_sa,i960:ca SUFFIX= \ + archfile=$(CGEN_CPU_DIR)/i960.cpu \ + FLAGS="with-scache with-profile=fn" \ + EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)" touch stamp-cpu cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu stamp-desc: $(CGEN_READ_SCM) $(CGEN_DESC_SCM) \ $(CGEN_CPU_DIR)/sparc.cpu $(CGEN_CPU_DIR)/sparccom.cpu $(CGEN_CPU_DIR)/i960.cpu $(CGEN_CPU_DIR)/i960.cpu $(MAKE) cgen-desc $(CGEN_FLAGS_TO_PASS) \ - cpu=i960 mach=all + cpu=i960 mach=all \ + archfile=$(CGEN_CPU_DIR)/i960.cpu touch stamp-desc i960-desc.c i960-desc.h i960-opc.h: $(CGEN_MAINT) stamp-desc Index: m32r/Makefile.in =================================================================== RCS file: /cvs/src/src/sim/m32r/Makefile.in,v retrieving revision 1.5 diff -u -p -r1.5 Makefile.in --- m32r/Makefile.in 5 Jul 2001 13:51:26 -0000 1.5 +++ m32r/Makefile.in 5 Sep 2003 15:13:56 -0000 @@ -126,6 +126,7 @@ CGEN_MAINT = ; @true stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CGEN_CPU_DIR)/m32r.cpu $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \ + archfile=$(CGEN_CPU_DIR)/m32r.cpu \ FLAGS="with-scache with-profile=fn" touch stamp-arch arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch @@ -133,6 +134,7 @@ arch.h arch.c cpuall.h: $(CGEN_MAINT) st stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/m32r.cpu $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ cpu=m32rbf mach=m32r SUFFIX= \ + archfile=$(CGEN_CPU_DIR)/m32r.cpu \ FLAGS="with-scache with-profile=fn" \ EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)" touch stamp-cpu @@ -140,6 +142,9 @@ cpu.h sem.c sem-switch.c model.c decode. stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/m32r.cpu $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ - cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)" + cpu=m32rxf mach=m32rx SUFFIX=x \ + archfile=$(CGEN_CPU_DIR)/m32r.cpu \ + FLAGS="with-scache with-profile=fn" \ + EXTRAFILES="$(CGEN_CPU_SEMSW)" touch stamp-xcpu cpux.h semx-switch.c modelx.c decodex.c decodex.h: $(CGEN_MAINT) stamp-xcpu