From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 5250 invoked by alias); 17 May 2004 16:43:11 -0000 Mailing-List: contact cgen-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: cgen-owner@sources.redhat.com Received: (qmail 5242 invoked from network); 17 May 2004 16:43:10 -0000 Received: from unknown (HELO sebabeach.org) (64.165.110.50) by sourceware.org with SMTP; 17 May 2004 16:43:10 -0000 Received: by sebabeach.org (Postfix, from userid 42) id 16F1BB525; Mon, 17 May 2004 09:43:38 -0700 (PDT) From: Doug Evans To: adrian.ashley@broadcom.com Cc: cgen@sources.redhat.com In-reply-to: <40A3CB25.9090305@broadcom.com> (adrian.ashley@broadcom.com) Subject: Re: tabling constant-field-beyond-base patch References: <20030806175257.64167B53E@mail.sebabeach.org> <40A3CB25.9090305@broadcom.com> Message-Id: <20040517164338.16F1BB525@sebabeach.org> Date: Mon, 17 May 2004 16:43:00 -0000 X-SW-Source: 2004-q2/txt/msg00007.txt.bz2 Date: Thu, 13 May 2004 20:23:17 +0100 From: "Adrian Ashley" Way back in Aug-2003, Doug Evans wrote: > Finishing up the remaining bits of this patch are proving difficult. > [N.B. The issues aren't of a technical nature.] So I'm tabling the > current state of the patch here. > > I hope to have the difficulties resolved RSN. Sigh. Update: The issues still aren't resolved and the ball isn't in my court to resolve them. Sigh. I'm working on a port to a (little-endian) machine which has some 64-bit instructions which are extended versions of 32-bit ones - i.e. ambiguous in the lower 32-bits but distinguishable by looking at some of the upper 32-bits. CGEN currently goes bong in -build-decode-table-entry when it detects the ambiguity. In my search through the archives it looks like this work might be a good starting point. Other postings referred to the possibility of making CGEN_INSN_INT a long long and removing all the assumptions that it is actually 32 bits - though replacing them with only slightly less rigid assumptions that it's "32 or 64". Has this problem been solved already? If not, can the sages offer advice as to the most fruitful way to proceed? I'm currently trying the "CGEN_INSN_INT is long long" approach, in the absence of fully understanding the bigger picture. IMO, without actually sitting down and studying the ISA in question, extending CGEN_INSN_INT isn't the way to go. CGEN_INSN_INT is a special case of the general solution, created to simplify handling of several popular architectures (32-bit riscs). Trying to generalize it has and will lead to issues, further complicating things. Have you looked at not using CGEN_INSN_INT and treating instructions as just a set of bytes (i.e. "cisc-like") ?