Re: Troubles building cris target

[Hans-Peter Nilsson <hans-peter.nilsson@axis.com>]

> Date: Wed, 16 Mar 2005 19:24:21 +0100
> From: Hans-Peter Nilsson <hp@axis.com>

> Ok to commit if it works?
> 
> 2005-03-16  Hans-Peter Nilsson  <hp@axis.com>
> 
> 	* sim-decode.scm (cgen-decode.c): Include cgen-ops.h.

That patch worked, as in compiles and cgen-utils.o contains the
intended symbols for cris-sim.  Calling again: any CGEN
maintainer care to comment, perhaps approve?  See earlier post
for the obvious patch.

For CRIS, removing the sim-main.h kludge as per below is
necessary too.  And of course, rebuilding decodev{10,32}.c is
also necessary.

Though until I get approval or other feedback from CGEN, I've
instead committed the following horrible patch, which fixes up
the generated decodev{10,32}.c after the fact but as soon as
it's generated.

(I couldn't find any system where gcc outlined some operator
calls like what happens for Jim Blandy, but then again I don't
have access to an amd64 system with FC2.  SuSE's gcc-3.3.3 on
amd64 does inline.  Ditto gcc-3.2 and 3.4 for various
hewlett-packard-testdrive systems.)

Jim, please update and retry.

I committed regen of all files; most changes in (other) regened
files were the copyright blurb, but there seems to have been
some gcc-4.0 fixes by Alan Modra.  Can't be all bad. :-)
Committed, after running the test-suite (which I haven't
contributed yet, doh!) except the C tests.

	* cris/Makefile.in (stamp-v10fcpu, stamp-v32fcpu): Add kludge to
	include cgen-ops.h in decodev10.c and decodev32.c.
	* cris/sim-main.h: Don't include cgen-ops.h here.
	* cris/arch.c, cris/arch.h, cris/cpuall.h, cris/cpuv10.c,
	cris/cpuv10.h, cris/cpuv32.c, cris/cpuv32.h, cris/cris-desc.c,
	cris/cris-desc.h, cris/cris-opc.h, cris/decodev10.c,
	cris/decodev10.h, cris/decodev32.c, cris/decodev32.h,
	cris/modelv10.c, cris/modelv32.c, cris/semcrisv10f-switch.c,
	cris/semcrisv32f-switch.c: Regenerate.

Index: sim-main.h
===================================================================
RCS file: /cvs/src/src/sim/cris/sim-main.h,v
retrieving revision 1.1
diff -p -c -u -p -r1.1 sim-main.h
--- sim-main.h	28 Jan 2005 04:29:00 -0000	1.1
+++ sim-main.h	24 Mar 2005 06:06:03 -0000
@@ -56,9 +56,6 @@ do { \
 #include "sim-base.h"
 #include "cgen-sim.h"
 #include "cris-sim.h"
-
-/* For occurrences of ANDIF in decodev32.c.  */
-#include "cgen-ops.h"
 \f
 struct cris_sim_mmapped_page {
   USI addr;
Index: Makefile.in
===================================================================
RCS file: /cvs/src/src/sim/cris/Makefile.in,v
retrieving revision 1.1
diff -p -c -u -p -r1.1 Makefile.in
--- Makefile.in	28 Jan 2005 04:28:59 -0000	1.1
+++ Makefile.in	24 Mar 2005 06:06:03 -0000
@@ -140,11 +140,14 @@ stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH
 	touch stamp-arch
 arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
 
+# The sed-hack is supposed to be temporary, until we get CGEN to emit it.
 stamp-v10fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/cris.cpu Makefile
 	$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
 	  archfile=$(CGEN_CPU_DIR)/cris.cpu \
 	  cpu=crisv10f mach=crisv10 SUFFIX=v10 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
 	$(SHELL) $(srcroot)/move-if-change $(srcdir)/semv10-switch.c $(srcdir)/semcrisv10f-switch.c
+	sed -ne 'p; s/^\(#include "sim-assert.h"\)$$/#include "cgen-ops.h"/p' < $(srcdir)/decodev10.c > decodev10.c.tmp
+	mv decodev10.c.tmp $(srcdir)/decodev10.c
 	touch stamp-v10fcpu
 cpuv10.h cpuv10.c semcrisv10f-switch.c modelv10.c decodev10.c decodev10.h: $(CGEN_MAINT) stamp-v10fcpu
 
@@ -153,6 +156,8 @@ stamp-v32fcpu: $(CGEN_READ_SCM) $(CGEN_C
 	  archfile=$(CGEN_CPU_DIR)/cris.cpu \
 	  cpu=crisv32f mach=crisv32 SUFFIX=v32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
 	$(SHELL) $(srcroot)/move-if-change $(srcdir)/semv32-switch.c $(srcdir)/semcrisv32f-switch.c
+	sed -ne 'p; s/^\(#include "sim-assert.h"\)$$/#include "cgen-ops.h"/p' < $(srcdir)/decodev32.c > decodev32.c.tmp
+	mv decodev32.c.tmp $(srcdir)/decodev32.c
 	touch stamp-v32fcpu
 cpuv32.h cpuv32.c semcrisv32f-switch.c modelv32.c decodev32.c decodev32.h: $(CGEN_MAINT) stamp-v32fcpu
 
brgds, H-P