From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 9606 invoked by alias); 14 Mar 2006 17:17:09 -0000 Received: (qmail 9598 invoked by uid 22791); 14 Mar 2006 17:17:09 -0000 X-Spam-Check-By: sourceware.org Received: from mx1.redhat.com (HELO mx1.redhat.com) (66.187.233.31) by sourceware.org (qpsmtpd/0.31) with ESMTP; Tue, 14 Mar 2006 17:17:05 +0000 Received: from int-mx1.corp.redhat.com (int-mx1.corp.redhat.com [172.16.52.254]) by mx1.redhat.com (8.12.11.20060308/8.12.11) with ESMTP id k2EHH2jT027267; Tue, 14 Mar 2006 12:17:02 -0500 Received: from pobox.toronto.redhat.com (pobox.toronto.redhat.com [172.16.14.4]) by int-mx1.corp.redhat.com (8.11.6/8.11.6) with ESMTP id k2EHGu112416; Tue, 14 Mar 2006 12:16:56 -0500 Received: from touchme.toronto.redhat.com (IDENT:postfix@touchme.toronto.redhat.com [172.16.14.9]) by pobox.toronto.redhat.com (8.12.8/8.12.8) with ESMTP id k2EHGuxX022539; Tue, 14 Mar 2006 12:16:56 -0500 Received: from ton.toronto.redhat.com (ton.toronto.redhat.com [172.16.14.15]) by touchme.toronto.redhat.com (Postfix) with ESMTP id 1D0288001FF; Tue, 14 Mar 2006 12:16:56 -0500 (EST) Received: from ton.toronto.redhat.com (localhost.localdomain [127.0.0.1]) by ton.toronto.redhat.com (8.13.1/8.13.1) with ESMTP id k2EHGtYq027536; Tue, 14 Mar 2006 12:16:55 -0500 Received: (from fche@localhost) by ton.toronto.redhat.com (8.13.1/8.13.1/Submit) id k2EHGtVP027530; Tue, 14 Mar 2006 12:16:55 -0500 Date: Tue, 14 Mar 2006 17:17:00 -0000 From: "Frank Ch. Eigler" To: Dave Brolley Cc: Hans-Peter Nilsson , cgen@sourceware.org Subject: Re: [RFA:] Fix breakage of manually building SID CPU Message-ID: <20060314171655.GG6930@redhat.com> References: <200603141334.k2EDYJrH005037@ignucius.se.axis.com> <4416F375.2010704@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4416F375.2010704@redhat.com> User-Agent: Mutt/1.4.1i X-IsSubscribed: yes Mailing-List: contact cgen-help@sourceware.org; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: cgen-owner@sourceware.org X-SW-Source: 2006-q1/txt/msg00020.txt.bz2 Hi - > >(i.e. the earliest occurrence of "delay" for the enabled mach). > >I guessed this could be related to some change in delay > >semantics, but the usage in cris.cpu seems no different to other > >*.cpu. [...] I believe (delay) was never implemented properly for the SIM backend, only for SID. I expect it to be treated rather like a no-op for SIM, or equivalently, that any SIM-targeting .cpu users of (delay) should work just as well without. - FChE