From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 4569 invoked by alias); 15 Mar 2006 00:20:24 -0000 Received: (qmail 4555 invoked by uid 22791); 15 Mar 2006 00:20:23 -0000 X-Spam-Check-By: sourceware.org Received: from miranda.se.axis.com (HELO miranda.se.axis.com) (193.13.178.8) by sourceware.org (qpsmtpd/0.31) with ESMTP; Wed, 15 Mar 2006 00:20:21 +0000 Received: from ignucius.se.axis.com (ignucius.se.axis.com [10.83.5.18]) by miranda.se.axis.com (8.12.9/8.12.9/Debian-5local0.1) with ESMTP id k2F0K6VJ023906; Wed, 15 Mar 2006 01:20:06 +0100 Received: from ignucius.se.axis.com (localhost [127.0.0.1]) by ignucius.se.axis.com (8.12.8p1/8.12.8/Debian-2woody1) with ESMTP id k2F0K6mC013704; Wed, 15 Mar 2006 01:20:06 +0100 Received: (from hp@localhost) by ignucius.se.axis.com (8.12.8p1/8.12.8/Debian-2woody1) id k2F0K6DU013700; Wed, 15 Mar 2006 01:20:06 +0100 Date: Wed, 15 Mar 2006 00:20:00 -0000 Message-Id: <200603150020.k2F0K6DU013700@ignucius.se.axis.com> From: Hans-Peter Nilsson To: fche@redhat.com CC: brolley@redhat.com, hans-peter.nilsson@axis.com, cgen@sourceware.org In-reply-to: <20060314224843.GK6930@redhat.com> (fche@redhat.com) Subject: Re: [RFA:] Fix breakage of manually building SID CPU Mailing-List: contact cgen-help@sourceware.org; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: cgen-owner@sourceware.org X-SW-Source: 2006-q1/txt/msg00025.txt.bz2 > Date: Tue, 14 Mar 2006 17:48:43 -0500 > From: "Frank Ch. Eigler" > > (delay 1 (set pc something)) > > was already implemented and working for SIM (fr30 uses it). [...] > > I'm curious how exactly that works. fr30 isn't in src/sim/ at the > moment, is it? Not sure what you mean by "exactly", but it works. Even as per the documentation! See src/sim/cris and src/cpu/cris.cpu. > > (set (delay 1 pc) something) > > was only implemtned for SID. > > I recall now that when we built support for a nasty open-pipelined > machine, this notational change made sense, since it was only register > sets that were "delayable", not general RTL expressions. Judging from the documentation, I guess the "only" refers to the CGEN-SID delay support. If the latter, I don't mind very much changing the port, if there can be sim support as well (Someone writing it, or perhaps Someone handholding me through implementing it), or (worse) some test-conditional applicable for defining a pmacro with differing contents (see src/cpu/mt.cpu:dset). brgds, H-P