From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 21145 invoked by alias); 15 Mar 2006 20:11:19 -0000 Received: (qmail 21135 invoked by uid 22791); 15 Mar 2006 20:11:18 -0000 X-Spam-Check-By: sourceware.org Received: from mx1.redhat.com (HELO mx1.redhat.com) (66.187.233.31) by sourceware.org (qpsmtpd/0.31) with ESMTP; Wed, 15 Mar 2006 20:11:16 +0000 Received: from int-mx1.corp.redhat.com (int-mx1.corp.redhat.com [172.16.52.254]) by mx1.redhat.com (8.12.11.20060308/8.12.11) with ESMTP id k2FKBDmv031666; Wed, 15 Mar 2006 15:11:13 -0500 Received: from pobox.toronto.redhat.com (pobox.toronto.redhat.com [172.16.14.4]) by int-mx1.corp.redhat.com (8.11.6/8.11.6) with ESMTP id k2FKB8119799; Wed, 15 Mar 2006 15:11:08 -0500 Received: from touchme.toronto.redhat.com (IDENT:postfix@touchme.toronto.redhat.com [172.16.14.9]) by pobox.toronto.redhat.com (8.12.8/8.12.8) with ESMTP id k2FKB7xX019989; Wed, 15 Mar 2006 15:11:07 -0500 Received: from ton.toronto.redhat.com (ton.toronto.redhat.com [172.16.14.15]) by touchme.toronto.redhat.com (Postfix) with ESMTP id A18C58001FF; Wed, 15 Mar 2006 15:11:07 -0500 (EST) Received: from ton.toronto.redhat.com (localhost.localdomain [127.0.0.1]) by ton.toronto.redhat.com (8.13.1/8.13.1) with ESMTP id k2FKB7VP004491; Wed, 15 Mar 2006 15:11:07 -0500 Received: (from fche@localhost) by ton.toronto.redhat.com (8.13.1/8.13.1/Submit) id k2FKB7i6004490; Wed, 15 Mar 2006 15:11:07 -0500 Date: Wed, 15 Mar 2006 20:11:00 -0000 From: "Frank Ch. Eigler" To: Hans-Peter Nilsson Cc: cgen@sourceware.org Subject: Re: [RFA:] Fix breakage of manually building SID CPU Message-ID: <20060315201107.GA22198@redhat.com> References: <441849ED.1030503@redhat.com> <200603151923.k2FJNEPH028873@ignucius.se.axis.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <200603151923.k2FJNEPH028873@ignucius.se.axis.com> User-Agent: Mutt/1.4.1i X-IsSubscribed: yes Mailing-List: contact cgen-help@sourceware.org; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: cgen-owner@sourceware.org X-SW-Source: 2006-q1/txt/msg00032.txt.bz2 Hi - > But it's not. A delayed branch doesn't (necessarily or usually) > run in parallel with the delayed instruction or the one after > the delayed one. One could sort of consider the delayed update to PC running in parallel with the next instruction, sort of. I don't recall all aspects of the design/notational decisions now. The work was certainly done for a processor that was "worst" of all worlds in terms of VLIW and open pipelines. Association with the cpu "parallel" field may have been for simplicity, using that as a mode selector instead of searching through the entire rtl for occurrences of (delay). See also: http://sourceware.org/ml/cgen/2003-q1/msg00004.html - FChE