From: "Frank Ch. Eigler" <fche@redhat.com>
To: Joern Rennecke <joernr@arc.com>
Cc: cgen@sources.redhat.com
Subject: Re: CGEN_DIS_HASH: how to get endianness and/or instruction size?
Date: Thu, 25 Jan 2007 22:15:00 -0000 [thread overview]
Message-ID: <20070125204300.GD30933@redhat.com> (raw)
In-Reply-To: <20070125203011.GB18395@elsdt-razorfish.arc.com>
Hi -
On Thu, Jan 25, 2007 at 08:30:11PM +0000, Joern Rennecke wrote:
> I've seen that, but it assumes that if the top 16 its are zero,
> the instruction can be hashed as a 16 bit instruction. That is not
> the case for ARCompact. [...]
Where are the bits that allow the insn to be decoded as a branch? How
the hardware know whether it's a 16- or 32-bit insn? Those are the
kind of bits are what are normally mingled into the hash. Maybe your
base_insn designation is too small.
> > It is important to realize though that this disassembler hashing
> > widget is strictly an optimization. [...]
>
> I can only verify this positively when I've completely finished the
> port so that other people can use it...
Indeed, but if you can accept a lesser standard of proof, you could
leave this part of the port till the end.
- FChE
next prev parent reply other threads:[~2007-01-25 22:15 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-01-25 14:20 Joern Rennecke
2007-01-25 15:00 ` Frank Ch. Eigler
2007-01-25 20:30 ` Joern Rennecke
2007-01-25 22:15 ` Frank Ch. Eigler [this message]
2007-01-26 1:11 Joern Rennecke
2007-01-26 1:31 ` Frank Ch. Eigler
2007-01-26 11:17 Joern Rennecke
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