From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 14992 invoked by alias); 2 Sep 2009 02:11:20 -0000 Received: (qmail 14970 invoked by uid 22791); 2 Sep 2009 02:11:18 -0000 X-SWARE-Spam-Status: No, hits=-2.2 required=5.0 tests=AWL,BAYES_00,J_CHICKENPOX_33,SPF_HELO_PASS,SPF_PASS X-Spam-Check-By: sourceware.org Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 02 Sep 2009 02:11:13 +0000 Received: from int-mx01.intmail.prod.int.phx2.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) by mx1.redhat.com (8.13.8/8.13.8) with ESMTP id n822BAXq018814; Tue, 1 Sep 2009 22:11:10 -0400 Received: from greed.delorie.com (ovpn01.gateway.prod.ext.phx2.redhat.com [10.5.9.1]) by int-mx01.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id n822B9nq023025 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Tue, 1 Sep 2009 22:11:10 -0400 Received: from greed.delorie.com (greed.delorie.com [127.0.0.1] (may be forged)) by greed.delorie.com (8.14.3/8.14.3) with ESMTP id n822B8IM027412; Tue, 1 Sep 2009 22:11:08 -0400 Received: (from dj@localhost) by greed.delorie.com (8.14.3/8.14.3/Submit) id n822B8eT027409; Tue, 1 Sep 2009 22:11:08 -0400 Date: Wed, 02 Sep 2009 02:11:00 -0000 Message-Id: <200909020211.n822B8eT027409@greed.delorie.com> From: DJ Delorie To: binutils@sourceware.org, cgen@sourceware.org Subject: [mep] Fix non-VLIW configurations. Mailing-List: contact cgen-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: cgen-owner@sourceware.org X-SW-Source: 2009-q3/txt/msg00092.txt.bz2 [cgen] * cpu/mep.opc (parse_signed16_range): Mark as potentially unused. (parse_unsigned16_range): Likewise. (mep_cgen_insn_supported_asm): Make BSR12 check dependent on VLIW isa. [opcodes] * mep-asm.c: Regenerate. * mep-desc.c: Regenerate. * mep-opc.c: Regenerate. Index: cgen/cpu/mep.opc =================================================================== RCS file: /cvs/src/src/cgen/cpu/mep.opc,v retrieving revision 1.8 diff -p -U3 -r1.8 mep.opc --- cgen/cpu/mep.opc 24 Jun 2009 01:44:52 -0000 1.8 +++ cgen/cpu/mep.opc 2 Sep 2009 02:08:09 -0000 @@ -90,9 +90,9 @@ extern int mep_cgen_insn_supported_asm ( const char * parse_mep_align (CGEN_CPU_DESC, const char **, enum cgen_operand_type, long *); const char * parse_mep_alignu (CGEN_CPU_DESC, const char **, enum cgen_operand_type, unsigned long *); static const char * parse_signed16 (CGEN_CPU_DESC, const char **, int, long *); -static const char * parse_signed16_range (CGEN_CPU_DESC, const char **, int, long *); +static const char * parse_signed16_range (CGEN_CPU_DESC, const char **, int, long *) ATTRIBUTE_UNUSED; static const char * parse_unsigned16 (CGEN_CPU_DESC, const char **, int, unsigned long *); -static const char * parse_unsigned16_range (CGEN_CPU_DESC, const char **, int, unsigned long *); +static const char * parse_unsigned16_range (CGEN_CPU_DESC, const char **, int, unsigned long *) ATTRIBUTE_UNUSED; static const char * parse_lo16 (CGEN_CPU_DESC, const char **, int, long *, long); static const char * parse_unsigned7 (CGEN_CPU_DESC, const char **, enum cgen_operand_type, unsigned long *); static const char * parse_zero (CGEN_CPU_DESC, const char **, int, long *); @@ -1647,11 +1647,13 @@ mep_cgen_insn_supported (CGEN_CPU_DESC c int mep_cgen_insn_supported_asm (CGEN_CPU_DESC cd, const CGEN_INSN *insn) { +#ifdef ISA_EXT_COP1_64 /* If we're assembling VLIW packets, ignore the 12-bit BSR as we can't relax that. The 24-bit BSR is matched instead. */ if (insn->base->num == MEP_INSN_BSR12 && cgen_bitset_contains (cd->isas, ISA_EXT_COP1_64)) return 0; +#endif return mep_cgen_insn_supported (cd, insn); }