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From: Christian Eggers <ceggers@gmx.de>
To: cgen@sourceware.org
Subject: Re: Non-contiguous opcodes
Date: Tue, 26 Jun 2018 04:24:00 -0000
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In-Reply-To: <20180623002359.GB11259@redhat.com>
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Dear Frank,

Am Samstag, 23. Juni 2018, 02:23:59 CEST schrieb Frank Ch. Eigler:
> Without digging into the ISA deeply, nor the two-decade-old memories,
> have you considered not doing it that way?  Consider instead treating
> the opcode-like subfields separately inside the define-normal-insn.
> So ditch the single insn-enum as it is, and instead of:
> 
> (define-normal-insn
>   revblo "Reverse Low Order Bytes" ()
>   "revblo $r"
>   (+ OP_REVBLO r)
>   [...]
> )
> 
> try:
> 
> (define-normal-insn
>   revblo "Reverse Low Order Bytes" ()
>   "revblo $r"
>   (+ (f-op15x5 17) (f-op7x8 0) r)
>   [...]
> )


I already tried this way and it's working. Perhaps I'll will try to put the 
non-contiguous opcode parts into separate enums (similar to fr30.cpu).


BTW: It's some ago seems the last commit into CVS. There may be some items 
which should be done (support for newer guile, error messages, ...). Do you 
think that cgen should be moved to binutils?

regards
Christian