From mboxrd@z Thu Jan  1 00:00:00 1970
From: Dave Brolley <brolley@redhat.com>
To: cgen@sources.redhat.com
Subject: CGEN: RELAXABLE and RELAX
Date: Fri, 18 Aug 2000 09:04:00 -0000
Message-id: <399D5EC7.C59F3DEF@redhat.com>
X-SW-Source: 2000-q3/msg00046.html

Hi,

The architecture I'm working with has two load immediate insns
that look syntactically identical except for the range of the
immediate value allowed:

ld Rn,imm8	; 8 bit immediate
ld Rn,imm16	; 16 bit immediate

The 8 bit load assembles to a 16 bit insn and the 16 bit load
assembles to a 32 bit insn. From the reading the CGEN manual, it
looks to me like this is what RELAXABLE and RELAX are supposed to
handle. i.e. specifying RELAXABLE on the 8 bit load will cause it
to be tried first during assembly and specifying RELAX on the 16
bit load will cause it to be tried next. I tried this, but when I
code 'ld r1,0x100', I get an error saying bad instruction. 'ld
r1,0xff' assembles correctly. It looks like the 16 bit load was
never considered. Am I missing something?

Thanks,
Dave