From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 8354 invoked by alias); 1 Feb 2002 06:33:11 -0000 Mailing-List: contact cgen-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: cgen-owner@sources.redhat.com Received: (qmail 8116 invoked from network); 1 Feb 2002 06:32:59 -0000 Received: from unknown (HELO localhost.redhat.com) (216.138.202.10) by sources.redhat.com with SMTP; 1 Feb 2002 06:32:59 -0000 Received: from cygnus.com (localhost [127.0.0.1]) by localhost.redhat.com (Postfix) with ESMTP id 25E3A3C88; Fri, 1 Feb 2002 01:32:52 -0500 (EST) Message-ID: <3C5A3694.7020502@cygnus.com> Date: Thu, 31 Jan 2002 22:33:00 -0000 From: Andrew Cagney User-Agent: Mozilla/5.0 (X11; U; NetBSD macppc; en-US; rv:0.9.7) Gecko/20020103 X-Accept-Language: en-us MIME-Version: 1.0 To: "Frank Ch. Eigler" Cc: Andrew Cagney , binutils@sources.redhat.com, cgen@sources.redhat.com Subject: Re: include/dis-asm.h patch for cgen disassemblers References: <20020131124350.C19966@redhat.com> <15449.42904.232177.265525@casey.transmeta.com> <20020131162132.I19966@redhat.com> <3C59BD4A.9060900@cygnus.com> <20020131184230.A6166@redhat.com> <3C59DB61.3000106@cygnus.com> <20020131195734.D6166@redhat.com> Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit X-SW-Source: 2002-q1/txt/msg00034.txt.bz2 > Hi - > > cagney wrote: > >> [...] > >> > isa ~= instruction set ~= group of machine instructions decodable; >> > can be a function of cpu state > >> >> Er, ISA == Instruction Set Architecture which to me is bfd_architecture. >> I think, here you're looking for something else. >> >> For instance, Arm has thumb and MIPS has MIPS16. They are modes but >> sill part of a single ISA. > > > Yes, but not in an interesting sense. It's much like the IA32 engine > inside IA64: they surely aren't the same ISA, despite being executable > by the same hardware, and operating partly on the same registers. > Sure, arm & thumb are closer together, and they may be documented in > the same publication, but that's not substantial to this question. Yes, and both bfd_arch_ia64 and bfd_arch_i386 are defined as separate bfd_architectures. > The conceptual issue is whether or not the choice of instructions > available is a function of processor state. For the purposes of > tools like disassemblers and simulators, and really even assemblers > and compilers, each such group forms a separate instruction set. Sorry, can you try that again. Andrew