From: Ronald Hecht <ronald.hecht@uni-rostock.de>
To: cgen@sourceware.org
Subject: Simulator and 24 Bit instructions
Date: Mon, 31 Jul 2006 08:44:00 -0000 [thread overview]
Message-ID: <44CDC354.9010502@uni-rostock.de> (raw)
Hello,
I'm having now problems with 24 Bit instructions in the simulator. I
tracked down the issue to common/sim-trace.c. In
sim_cgen_disassemble_insn() I found
if (insn_bit_length <= 32)
base_length = insn_bit_length;
else
base_length = min (cd->base_insn_bitsize, insn_bit_length);
switch (base_length)
{
case 0 : return; /* fake insn, typically "compile" (aka "invalid") */
case 8 : insn_value = insn_buf.bytes[0]; break;
case 16 : insn_value = T2H_2 (insn_buf.shorts[0]); break;
case 32 : insn_value = T2H_4 (insn_buf.words[0]); break;
default: abort ();
}
So 24 Bit instructions are a problem. I hacked
case 24 : insn_value = (T2H_4 (insn_buf.words[0]) / 256) &
0x00ffffff; break;
and it works for me. But I think this might be a problem on big endian
machines or is this hack ok?
Thanks in advance
Ronald
next reply other threads:[~2006-07-31 8:44 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-07-31 8:44 Ronald Hecht [this message]
2006-07-31 15:27 ` Frank Ch. Eigler
2006-07-31 16:00 ` Ronald Hecht
2006-08-03 20:07 ` Dave Brolley
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