From: Jean-Marc Saffroy <jean-marc.saffroy@joguin.com>
To: Doug Evans <dje@sebabeach.org>
Cc: cgen@sourceware.org
Subject: Re: problem with 64-bit arch
Date: Thu, 01 Oct 2009 16:34:00 -0000 [thread overview]
Message-ID: <4AC4DA04.7080503@joguin.com> (raw)
In-Reply-To: <4AC4D17D.30308@sebabeach.org>
Doug Evans wrote:
> We were just discussing instruction word bitsizes of 64, and it's not
> clear what to do.
> I don't mind going down the path of having 64 bit instructions expressed
> as a single 64 bit integer (*1), but can you confirm your architecture
> has 64-bit instructions? From the given sample, it seems like it has 32
> bit instructions and 64-bit words (like sparc64).
You guessed right: my target arch has 32 bit instructions (which I
expressed with base-insn-bitsize == 32), and uses 64-bit words for data
and addresses (expressed with word-bitsize == 64).
> Clearly the missing type in the cast is a bug. That should be easy to
> fix. As for the use of long to record a 64-bit value, that should also
> be (relatively) easy to fix.
> I'll dig deeper tonight.
Good to hear, thanks!
I found the cast could be fixed by changing the "(dfm 'DI..." line in
mode.scm, but have no idea about the possible side effects, and didn't
find a cure for the use of long anyway.
Cheers,
JM
next prev parent reply other threads:[~2009-10-01 16:34 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-10-01 14:41 Jean-Marc Saffroy
2009-10-01 15:57 ` Doug Evans
2009-10-01 16:34 ` Jean-Marc Saffroy [this message]
2009-10-02 17:58 ` Doug Evans
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