From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 31503 invoked by alias); 2 Nov 2010 16:18:25 -0000 Received: (qmail 31457 invoked by uid 22791); 2 Nov 2010 16:18:19 -0000 X-SWARE-Spam-Status: No, hits=-5.8 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_HI,SPF_HELO_PASS,TW_FC,TW_XF,T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Tue, 02 Nov 2010 16:18:11 +0000 Received: from int-mx09.intmail.prod.int.phx2.redhat.com (int-mx09.intmail.prod.int.phx2.redhat.com [10.5.11.22]) by mx1.redhat.com (8.13.8/8.13.8) with ESMTP id oA2GI9Yu025693 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Tue, 2 Nov 2010 12:18:09 -0400 Received: from [10.36.7.233] (vpn1-7-233.ams2.redhat.com [10.36.7.233]) by int-mx09.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id oA2GI6Wj019459; Tue, 2 Nov 2010 12:18:07 -0400 Message-ID: <4CD039BE.2080604@redhat.com> Date: Tue, 02 Nov 2010 16:18:00 -0000 From: Nick Clifton User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.9.1.12) Gecko/20100907 Fedora/3.0.7-1.fc12 Thunderbird/3.0.7 MIME-Version: 1.0 To: Dave Brolley , "Frank Ch. Eigler" CC: cgen@sourceware.org, sid@sourceware.org, dj@redhat.com Subject: Re: RFA: XStormy16: Fix implementation of MOVF instruction References: <4CCEE146.4050908@redhat.com> In-Reply-To: <4CCEE146.4050908@redhat.com> Content-Type: multipart/mixed; boundary="------------060507040205020503060702" Mailing-List: contact cgen-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: cgen-owner@sourceware.org X-SW-Source: 2010-q4/txt/msg00004.txt.bz2 This is a multi-part message in MIME format. --------------060507040205020503060702 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-length: 1888 Hi Dave, Hi Frank, > I don't know that this port has a maintainer for CGEN/SID. However, I > think that testing against a specific test case which exhibits the bug > and running the SID testsuite for --target=xstormy16-elf should be > sufficient. I see that there is no test case for this insn in > sid/component/testsuite/sidcomp.cgen-cpu.xstormy16, so please add one > before running the test suite. The attached patch does that. (It actually adds 4 new tests, one for each variant of the pre-decrement/post-increment load/store version of the MOVF instruction). In the course of checking the patch I also found that all of the XStormy16 tests were failing because the "pass" and "fail" macros had not been updated to match the new parameter layout for the write syscall. So the patch fixes this as well. Then I found several testcases that were failing due to endian mistakes, so those have been fixed as well. Tested with an xstormy16-elf toolchain and no regressions. OK to apply (along with the original MOVF patch) ? Cheers Nick 2010-11-02 Nick Clifton * testutils.inc (pass): Update parameter layout for write syscall. (fail): Likewise. * movgrgrii.cgs: Fix endianness typo in assertion. * movgrgriipostinc.cgs: Likewise. * movgrgriipredec.cgs: Likewise. * movgrgripostinc.cgs: Likewise. * movgrgripredec.cgs: Likewise. * movgrigr.cgs: Likewise. * movgriipostincgr.cgs: Likewise. * movgripostincgr.cgs: Likewise. * movgripredecgr.cgs: Likewise. * rrcgrgr.cgs: Rotate only inserts carry flag once. * rrcgrimm4.cgs: Likewise. * movfgrgriipostinc.cgs: New test. Checks MOVF load with post increment. * movfgrgriipredec.cgs: New test. Checks MOVF load with pre decrement. * movfgriipostincgr.cgs: New test. Checks MOVF store with post increment. * movfgriipostincgr.cgs: New test. Checks MOVF store with pre decrement. --------------060507040205020503060702 Content-Type: text/x-diff; name="xstormy16.sid.testsuite.patch" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="xstormy16.sid.testsuite.patch" Content-length: 12857 2010-11-02 Nick Clifton * testutils.inc (pass): Update parameter layout for write syscall. (fail): Likewise. * movgrgrii.cgs: Fix endianness typo in assertion. * movgrgriipostinc.cgs: Likewise. * movgrgriipredec.cgs: Likewise. * movgrgripostinc.cgs: Likewise. * movgrgripredec.cgs: Likewise. * movgrigr.cgs: Likewise. * movgriipostincgr.cgs: Likewise. * movgripostincgr.cgs: Likewise. * movgripredecgr.cgs: Likewise. * rrcgrgr.cgs: Rotate only inserts carry flag once. * rrcgrimm4.cgs: Likewise. * movfgrgriipostinc.cgs: New test. Checks MOVF load with post increment. * movfgrgriipredec.cgs: New test. Checks MOVF load with pre decrement. * movfgriipostincgr.cgs: New test. Checks MOVF store with post increment. * movfgriipostincgr.cgs: New test. Checks MOVF store with pre decrement. Index: sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/testutils.inc =================================================================== RCS file: /cvs/src/src/sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/testutils.inc,v retrieving revision 1.1 diff -u -3 -p -w -r1.1 testutils.inc --- sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/testutils.inc 17 Dec 2001 09:31:21 -0000 1.1 +++ sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/testutils.inc 2 Nov 2010 15:42:13 -0000 @@ -33,7 +33,8 @@ fail_str: mov r1, #5 ; write syscall mov r2, #1 ; write(fileno(stdout), "pass", 5) mov.w r3, #pass_str - mov r4, #5 + mov r4, #0 + mov r5, #5 ; length .byte 0x01 .byte 0x00 exit 0 @@ -43,7 +44,8 @@ fail_str: mov r1, #5 ; write syscall mov r2, #1 ; write(fileno(stdout), "fail", 5) mov.w r3, #fail_str - mov r4, #5 + mov r4, #0 + mov r5, #5 ; length .byte 0x01 .byte 0x00 exit 1 Index: sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgrgrii.cgs =================================================================== RCS file: /cvs/src/src/sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgrgrii.cgs,v retrieving revision 1.1 diff -u -3 -p -w -r1.1 movgrgrii.cgs --- sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgrgrii.cgs 17 Dec 2001 09:31:21 -0000 1.1 +++ sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgrgrii.cgs 2 Nov 2010 15:32:46 -0000 @@ -20,7 +20,7 @@ movgrgrii: mov.w r2, (r1, 2) assert r2, 0xadde mov.w r2, (r1, 1) - assert r2, 0xface + assert r2, 0xcefa br okay Index: sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgrgriipostinc.cgs =================================================================== RCS file: /cvs/src/src/sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgrgriipostinc.cgs,v retrieving revision 1.1 diff -u -3 -p -w -r1.1 movgrgriipostinc.cgs --- sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgrgriipostinc.cgs 17 Dec 2001 09:31:21 -0000 1.1 +++ sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgrgriipostinc.cgs 2 Nov 2010 15:32:46 -0000 @@ -22,7 +22,7 @@ movgrgriipostinc: assert r2, 0xadde sub r1, #2 mov.w r2, (r1++, 1) - assert r2, 0xface + assert r2, 0xcefa br okay Index: sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgrgriipredec.cgs =================================================================== RCS file: /cvs/src/src/sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgrgriipredec.cgs,v retrieving revision 1.1 diff -u -3 -p -w -r1.1 movgrgriipredec.cgs --- sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgrgriipredec.cgs 17 Dec 2001 09:31:21 -0000 1.1 +++ sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgrgriipredec.cgs 2 Nov 2010 15:32:46 -0000 @@ -22,7 +22,7 @@ movgrgriipredec: assert r2, 0xcefa add r1, #4 mov.w r2, (--r1, 1) - assert r2, 0xface + assert r2, 0xcefa br okay Index: sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgrgripostinc.cgs =================================================================== RCS file: /cvs/src/src/sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgrgripostinc.cgs,v retrieving revision 1.1 diff -u -3 -p -w -r1.1 movgrgripostinc.cgs --- sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgrgripostinc.cgs 17 Dec 2001 09:31:21 -0000 1.1 +++ sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgrgripostinc.cgs 2 Nov 2010 15:32:46 -0000 @@ -22,7 +22,7 @@ movgrgripostinc: assert r2, 0xcefa sub r1, #1 mov.w r2, (r1++) - assert r2, 0xface + assert r2, 0xcefa br okay Index: sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgrgripredec.cgs =================================================================== RCS file: /cvs/src/src/sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgrgripredec.cgs,v retrieving revision 1.1 diff -u -3 -p -w -r1.1 movgrgripredec.cgs --- sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgrgripredec.cgs 17 Dec 2001 09:31:21 -0000 1.1 +++ sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgrgripredec.cgs 2 Nov 2010 15:32:46 -0000 @@ -24,7 +24,7 @@ movgrgripredec: assert r2, 0xadde add r1, #3 mov.w r2, (--r1) - assert r2, 0xdead + assert r2, 0xadde br okay Index: sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgrigr.cgs =================================================================== RCS file: /cvs/src/src/sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgrigr.cgs,v retrieving revision 1.1 diff -u -3 -p -w -r1.1 movgrigr.cgs --- sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgrigr.cgs 17 Dec 2001 09:31:21 -0000 1.1 +++ sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgrigr.cgs 2 Nov 2010 15:32:46 -0000 @@ -24,12 +24,12 @@ movgrigr: add r1, #1 mov.b (r1), r2 ; fc ae de ad mov.w r2, (r1) - assert r2, 0xfcae + assert r2, 0xaefc mov.w (r1), r2 ; fc ae de ad sub r1, #1 mov.w r2, (r1) - assert r2, 0xfcae + assert r2, 0xaefc br okay Index: sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgriipostincgr.cgs =================================================================== RCS file: /cvs/src/src/sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgriipostincgr.cgs,v retrieving revision 1.1 diff -u -3 -p -w -r1.1 movgriipostincgr.cgs --- sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgriipostincgr.cgs 17 Dec 2001 09:31:21 -0000 1.1 +++ sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgriipostincgr.cgs 2 Nov 2010 15:32:46 -0000 @@ -18,7 +18,7 @@ movgriipostincgr: mov r2, #0xfc mov.b (r1++, 1), r2 ; fa fc de ad mov.w r2, (r1) - assert r2, 0xfafc + assert r2, 0xfcfa mov r2, #0xae sub r1, #1 Index: sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgripostincgr.cgs =================================================================== RCS file: /cvs/src/src/sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgripostincgr.cgs,v retrieving revision 1.1 diff -u -3 -p -w -r1.1 movgripostincgr.cgs --- sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgripostincgr.cgs 17 Dec 2001 09:31:21 -0000 1.1 +++ sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgripostincgr.cgs 2 Nov 2010 15:32:46 -0000 @@ -12,15 +12,14 @@ data: .byte 0xfa,0xce,0xde,0xad .global movgripostincgr movgripostincgr: mov r1, #data - mov r2, #0xfc mov.b (r1++), r2 ; fc ce de ad mov.w r2, (r1) - assert r2, 0xfcce + assert r2, 0xcefc mov r2, #0xae add r1, #1 - mov.b (r1++), r2 ; fa fc ae ad + mov.b (r1++), r2 ; fc ce ae ad mov.w r2, (r1, -1) assert r2, 0xadae Index: sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgripredecgr.cgs =================================================================== RCS file: /cvs/src/src/sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgripredecgr.cgs,v retrieving revision 1.1 diff -u -3 -p -w -r1.1 movgripredecgr.cgs --- sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgripredecgr.cgs 17 Dec 2001 09:31:21 -0000 1.1 +++ sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgripredecgr.cgs 2 Nov 2010 15:32:46 -0000 @@ -14,11 +14,10 @@ edata: movgripredecgr: ;mov.b (--r0),r0 mov r1, #edata - mov r2, #0xfc mov.b (--r1), r2 ; fa ce de fc mov.w r2, (r1) - assert r2, 0xdefc + assert r2, 0xfcde mov r2, #0xae sub r1, #1 Index: sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/rrcgrgr.cgs =================================================================== RCS file: /cvs/src/src/sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/rrcgrgr.cgs,v retrieving revision 1.1 diff -u -3 -p -w -r1.1 rrcgrgr.cgs --- sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/rrcgrgr.cgs 17 Dec 2001 09:31:21 -0000 1.1 +++ sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/rrcgrgr.cgs 2 Nov 2010 15:32:46 -0000 @@ -12,7 +12,7 @@ rrcgrgr: mov r3, #0xffff add r3, #1 rrc r1, r2 - assert r1, 0xc021 + assert r1, 0x4021 br okay Index: sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/rrcgrimm4.cgs =================================================================== RCS file: /cvs/src/src/sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/rrcgrimm4.cgs,v retrieving revision 1.1 diff -u -3 -p -w -r1.1 rrcgrimm4.cgs --- sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/rrcgrimm4.cgs 17 Dec 2001 09:31:21 -0000 1.1 +++ sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/rrcgrimm4.cgs 2 Nov 2010 15:32:46 -0000 @@ -11,7 +11,7 @@ rrcgrimm4: mov r3, #0xffff add r3, #1 rrc r1, #2 - assert r1, 0xc021 + assert r1, 0x4021 br okay *** /dev/null 2010-11-02 07:38:56.310536038 +0000 --- sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movfgrgriipostinc.cgs 2010-11-02 15:24:54.000000000 +0000 *************** *** 0 **** --- 1,35 ---- + # xstormy16 testcase for movf[.b] $Rdm,($Rb,$Rs++,N) -*- Asm -*- + # mach: all + + .include "testutils.inc" + + start + + .data + data: .byte 0xfa,0xce,0xde,0xad + .text + + .global movfgrgriipostinc + movfgrgriipostinc: + mov r1, @lo(#data) + mov r8, @hi(#data) + movf.b r2, (r8,r1++) + assert r2, 0xfa + movf.b r2, (r8,r1++,1) + assert r2, 0xde + + movf.w r2, (r8,r1++,0) + assert r2, 0xadde + + mov r1, #0xfffe + mov r8, #0x0000 + movf.w r2, (r8,r1++,0) + assert r1, 0x0000 + assert r8, 0x0001 + + br okay + + wrong: + fail + okay: + pass *** /dev/null 2010-11-02 07:38:56.310536038 +0000 --- sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movfgrgriipredec.cgs 2010-11-02 15:24:54.000000000 +0000 *************** *** 0 **** --- 1,36 ---- + # xstormy16 testcase for movf[.b] $Rdm,($Rb,--$Rs,N) -*- Asm -*- + # mach: all + + .include "testutils.inc" + + start + + .data + data: .byte 0xfa,0xce,0xde,0xad + mdata: .byte 0x01,0x02,0x03,0x04 + .text + + .global movfgrgriipredec + movfgrgriipredec: + mov r1, @lo(#mdata) + mov r8, @hi(#mdata) + movf.b r2, (r8,--r1) + assert r2, 0xad + movf.b r2, (r8,--r1,1) + assert r2, 0xad + + movf.w r2, (r8,--r1,0) + assert r2, 0xcefa + + mov r1, #0x0000 + mov r8, #0x0002 + movf.w r2, (r8,--r1,0) + assert r1, 0xfffe + assert r8, 0x0001 + + br okay + + wrong: + fail + okay: + pass *** /dev/null 2010-11-02 07:38:56.310536038 +0000 --- sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movfgriipostincgr.cgs 2010-11-02 15:24:54.000000000 +0000 *************** *** 0 **** --- 1,38 ---- + # xstormy16 testcase for movf[.b] ($Rb,--$Rs,N),$Rdm -*- Asm -*- + # mach: all + + .include "testutils.inc" + + start + + .data + data: .byte 0xfa,0xce,0xde,0xad + .text + + .global movfgriipostincrgr + movfgriipostincgr: + mov r1, @lo(#data) + mov r8, @hi(#data) + mov r2, #0xfc ; v + movf.b (r8,++r1), r2 ; fc ce de ad + movf.w r3, (r8, r1) + assert r3, 0xcefc + + mov r2, #0xff ; v + movf.b (r8,++r1,2), r2 ; fc ce de ff + movf.w r3, (r8, r1) + assert r3, 0xffde + + mov r2, #0xeeee ; v + movf.w (r8,r1++,0), r2 ; f1 ce ee ee + mov r1, @lo(#data) + mov r8, @hi(#data) + movf.w r3, (r8, r1,2) + assert r3, 0xeeee + + br okay + + wrong: + fail + okay: + pass *** /dev/null 2010-11-02 07:38:56.310536038 +0000 --- sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movfgriipredecgr.cgs1w 2010-11-02 15:24:54.000000000 +0000 *************** *** 0 **** --- 1,37 ---- + # xstormy16 testcase for movf[.b] ($Rb,--$Rs,N),$Rdm -*- Asm -*- + # mach: all + + .include "testutils.inc" + + start + + .data + data: .byte 0xfa,0xce,0xde,0xad + mdata: .byte 0x01,0x02,0x03,0x04 + .text + + .global movfgriipredecgr + movfgriipredecgr: + mov r1, @lo(#mdata) + mov r8, @hi(#mdata) + mov r2, #0xfc ; v + movf.b (r8,--r1), r2 ; fa ce de fc 01 02 03 04 + movf.w r3, (r8, r1) + assert r3, 0xfcde + + mov r2, #0xff ; v + movf.b (r8,--r1,3), r2 ; fa ce de fc 01 ff 03 04 + movf.w r3, (r8, r1,2) + assert r3, 0xff01 + + mov r2, #0xf1 ; v + movf.w (r8,--r1,0), r2 ; f1 ce de fc 01 ff 03 04 + movf.w r3, (r8, r1,1) + assert r3, 0xcef1 + + br okay + + wrong: + fail + okay: + pass --------------060507040205020503060702--