From: jemarch@gnu.org (Jose E. Marchesi)
To: "Frank Ch. Eigler" <fche@redhat.com>
Cc: cgen@sourceware.org
Subject: Re: Hi there
Date: Thu, 19 Jan 2012 21:01:00 -0000 [thread overview]
Message-ID: <87d3afmmp0.fsf@gnu.org> (raw)
In-Reply-To: <20120119192019.GA4174@redhat.com> (Frank Ch. Eigler's message of "Thu, 19 Jan 2012 14:20:19 -0500")
> I am using cgen for the development of a LEON3 simulator, partly funded
> by my employer.
Neat. Are you starting from one of the other SPARC models?
Probably yes. I am currently reading the cgen/cpu/sparc*.cpu RTL files.
It looks like they are not being updated since long ago, and that they
are not being used in binutils.
I copied them into my local git repo (which will be public as soon as I
reach a stage where at least the ISA simulator runs) since I need to do
extensive modifications, such as explicitly supporting a V7 machine for
ERC32 and the models themselves.
Which simulator framework are you planning to use (gdb/sim vs. sid)?
gdb. I am still in the stage on getting familiar with the common sim
infrastructure, but it looks like it provides enough flexibility (in
terms of buses, signals, etc) for my purposes.
Besides, my company filed a copyright assignment for gdb, and I have got
a personal one in place as well :)
BTW, do I need to sign separated papers for CGEN?
--
Jose E. Marchesi http://www.jemarch.net
GNU Project http://www.gnu.org
next prev parent reply other threads:[~2012-01-19 21:01 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-01-19 19:18 Jose E. Marchesi
2012-01-19 19:20 ` Frank Ch. Eigler
2012-01-19 21:01 ` Jose E. Marchesi [this message]
2012-01-19 21:04 ` Frank Ch. Eigler
2012-01-19 21:30 ` Jose E. Marchesi
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