From: jose.marchesi@oracle.com (Jose E. Marchesi)
To: cgen@sourceware.org
Subject: [PATCH] Fix a couple of comment typos
Date: Wed, 28 Nov 2018 20:22:00 -0000 [thread overview]
Message-ID: <87zhttosth.fsf@oracle.com> (raw)
Hello there. Just fixing a couple of typos in comments :)
Salud!
cgen/ChangeLog:
2018-11-28 Jose E. Marchesi <jose.marchesi@oracle.com>
* mach.scm (<isa>): Fix documentation of base-insn-bitsize.
(state-base-insn-bitsize): Likewise in function docstring.
(/adata-set-derived!): Fix documentation of large-insn-word?
initializer.
Index: cgen/mach.scm
===================================================================
RCS file: /cvs/src/src/cgen/mach.scm,v
retrieving revision 1.28
diff -u -r1.28 mach.scm
--- cgen/mach.scm 13 Feb 2010 03:39:15 -0000 1.28
+++ cgen/mach.scm 28 Nov 2018 20:20:53 -0000
@@ -1079,7 +1079,7 @@
;; and by the simulator's invalid insn handler.
default-insn-bitsize
- ;; Number of bytes of insn that can be initially fetched.
+ ;; Number of bits of insn that can be initially fetched.
;; In non-LIW isas this would be the length of the smallest
;; insn. For LIW isas it depends - only one LIW isa is
;; currently supported (m32r).
@@ -1716,7 +1716,7 @@
(car dib))
)
-;; Number of bytes of insn we can initially fetch.
+;; Number of bits of insn we can initially fetch.
;; All selected isas must have same value or error.
(define (state-base-insn-bitsize)
@@ -1794,7 +1794,7 @@
(make <derived-arch-data>
;; integral-insn?
(delay (isa-integral-insn? (current-isa)))
- ;; insn-word-bitsize
+ ;; large-insn-word?
(> (apply max (map isa-base-insn-bitsize (current-isa-list))) 32)
))
)
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