From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 26565 invoked by alias); 15 Jan 2012 03:25:03 -0000 Received: (qmail 26547 invoked by uid 22791); 15 Jan 2012 03:25:01 -0000 X-SWARE-Spam-Status: No, hits=-2.7 required=5.0 tests=AWL,BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,RCVD_IN_DNSWL_LOW X-Spam-Check-By: sourceware.org Received: from mail-vw0-f41.google.com (HELO mail-vw0-f41.google.com) (209.85.212.41) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Sun, 15 Jan 2012 03:24:48 +0000 Received: by vbbfa15 with SMTP id fa15so277873vbb.0 for ; Sat, 14 Jan 2012 19:24:48 -0800 (PST) Received: by 10.52.65.101 with SMTP id w5mr3292187vds.27.1326597886285; Sat, 14 Jan 2012 19:24:46 -0800 (PST) MIME-Version: 1.0 Received: by 10.52.67.105 with HTTP; Sat, 14 Jan 2012 19:24:25 -0800 (PST) From: Julius Baxter Date: Sun, 15 Jan 2012 03:25:00 -0000 Message-ID: Subject: Delay slots in GNU sim To: cgen@sourceware.org Content-Type: text/plain; charset=ISO-8859-1 X-IsSubscribed: yes Mailing-List: contact cgen-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: cgen-owner@sourceware.org X-SW-Source: 2012-q1/txt/msg00003.txt.bz2 Hi, I've been working on the OpenRISC CGEN description and have got the assembler working and am now looking at getting a GNU sim port running too. I can see a lot of functionality working OK so far (I've based my simulator port on the lm32 and m32r ports, which are both CGEN-based implementations of the simulator) but one thing which is not working are delay slots. They never appear to b executed when a branch is going to be taken. I'm yet to delve into the workings if the simulator to figure out why it's not executing the delay slots, but I just wanted to ask if this is a known issue with the particular configuration I'm using. The sim port has "#define WITH_SCACHE_PBB 1", in the tconfig.in file and the Makefile calls the mloop.c generation script with: ... $(SHELL) $(srccom)/genmloop.sh \ -mono -fast -pbb -full-switch -switch sem-switch.c \ -cpu or1k32bef -infile $(srcdir)/mloop.in ... My understanding is that this will generate a main loop for a "fast" model with pseudo-basic-block processing. This is an "upgrade" over the default "simple" model without pbb. I'm wondering if delay slots not working are a known issue when compiling a fast model with pbb support? As far as I can tell, my semantic description is correct. For example, the jump instruction is: (dni l-j "jump (pc-relative iaddr)" ; This function may not be in delay slot (NOT-IN-DELAY-SLOT) "l.j ${disp-26}" (+ OPC_J disp-26) ; We execute the delay slot before doin' the real branch (delay 1 (set pc disp-26)) () ) Other semantic descriptions of delay slot execution appear to be along the same lines, but I can't see any CGEN-based sim ports which have instructions with delay slots, so, as I said, I'm wondering if this is even supported at all. Thanks for any help, Julius