* 2-word field extraction issue
@ 2011-08-08 14:49 Aurelien Buhrig
0 siblings, 0 replies; only message in thread
From: Aurelien Buhrig @ 2011-08-08 14:49 UTC (permalink / raw)
To: cgen
Hi,
I'm modifiying our existing sid port for our 16-bit MCU to add a
branch instruction with a 22-bit pcrel offset. Here is the short
description:
(define-arch
(name tam16)
(default-alignment aligned)
(insn-lsb0? #f)
...)
(define-isa
(name tam16)
(default-insn-bitsize 16)
(base-insn-bitsize 16)
(default-insn-word-bitsize 16))
(define-cpu
(name tam16bf)
(endian big)
(word-bitsize 16)
(insn-chunk-bitsize 0))
The new 22-bit pcrel branch instruction is 2-word long and the pcrel
corresponding field is continuous. I tried to define it like this:
(define-ifield
(name f-pcrel22)
(attrs PCREL-ADDR)
(word-offset 0)
(word-length 32)
(start 10)
(length 22)
(mode INT)
(encode (...))
(decode (...))))
The generated code for extraction this field in
tam16bf_extract_sfmt_bsr22l tam16bf_extract_sfmt_bsr22l
(tam16-decode.cxx file)
is EXTRACT_MSB0_SINT (insn, 16, 10, 22), which I think is wrong (base
insn are 16-bit long).
I worked around this problem by defining a multi-ifield with insert
and extract expressions to make it doing the correct thing, but i'm
wondering if it should be a bug ?
Aurelien
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