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From: Sergey Belyashov <sergey.belyashov@gmail.com>
To: Sergey Belyashov via Cgen <cgen@sourceware.org>
Subject: Re: BUG: non-fixed-length ISAs are unsupported for now
Date: Thu, 30 Jul 2020 12:11:43 +0300	[thread overview]
Message-ID: <CAOe0RDxwHg4GZigSOm1c9xWafriO=WEAh=U6T3QhR4uLbgBfrA@mail.gmail.com> (raw)
In-Reply-To: <CAOe0RDywVAHVfwZhAwvJhdSYHf5nmbXwsWpZVLf90xxY3tgUKg@mail.gmail.com>

Hi,

Can anybody help me, how to correctly implement Zilog Z80 (and
derivatives) instruction decode table switching in CGEN? For example,
the main table has 1 byte instruction and possibly 1-2 bytes of
immediate operand. There are four (ez80 has eight) pseudo instructions
which switches tables for current instruction:
* 0xCB - next byte is rotation or bit manipulation instruction code,
no optional operands;
* 0xED - next byte is instruction of extended instruction set,
possible 1-2 bytes of immediate operand;
* 0xDD/0xFD - switches use of H, L and HL registers to IX/IY on main
and 0xCB tables (here is difficult, because always added immediate
before instruction code: 0xDD 0xCB 0x07 0x3E - "srl (ix+7)").
I think, it should be done in following way:
* it is need to create 5 ISAs: isa_00, isa_cb, isa_ed, isa_ii_00, isa_ii_cb
* opcodes 0xCB, 0xDD, 0xED, 0xFD just switches ISA for current instruction
* <I do not know what I need to do for assembler support, how to parse
by all tables>

Best regards,
Sergey Belyashov

  reply	other threads:[~2020-07-30  9:11 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-23 13:37 Sergey Belyashov
2020-04-27 16:29 ` Frank Ch. Eigler
2020-04-27 17:00   ` Sergey Belyashov
2020-04-27 17:52     ` Sergey Belyashov
2020-04-27 18:03     ` Jose E. Marchesi
2020-04-27 19:34       ` Sergey Belyashov
2020-04-27 20:01         ` Jose E. Marchesi
2020-04-27 20:23           ` Sergey Belyashov
2020-04-29 19:11           ` Sergey Belyashov
2020-07-30  9:11             ` Sergey Belyashov [this message]
2020-08-11 15:38               ` Frank Ch. Eigler
2020-08-11 15:57                 ` Sergey Belyashov
2020-08-11 16:08                   ` Frank Ch. Eigler
2020-08-12 13:59                     ` Sergey Belyashov
2020-08-12 18:36                       ` Frank Ch. Eigler
2020-08-12 18:53                         ` Jose E. Marchesi
2020-08-12 19:19                           ` Sergey Belyashov
2020-08-12 19:21                             ` Frank Ch. Eigler
2020-08-12 19:27                               ` Jose E. Marchesi
2020-08-12 19:44                                 ` Sergey Belyashov
2020-08-12 19:57                                   ` Frank Ch. Eigler
2020-08-13 13:34                                     ` Sergey Belyashov
2020-08-13 14:32                                       ` Frank Ch. Eigler
2020-08-13 14:47                                         ` Sergey Belyashov

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