From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 4600 invoked by alias); 4 Nov 2002 14:24:27 -0000 Mailing-List: contact cgen-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: cgen-owner@sources.redhat.com Received: (qmail 4478 invoked from network); 4 Nov 2002 14:24:26 -0000 Received: from unknown (HELO boden.synopsys.com) (204.176.20.19) by sources.redhat.com with SMTP; 4 Nov 2002 14:24:26 -0000 Received: from mother.synopsys.com (mother.synopsys.com [146.225.100.171]) by boden.synopsys.com (Postfix) with ESMTP id E7517DDB0; Mon, 4 Nov 2002 06:24:25 -0800 (PST) Received: from fr02.synopsys.com (localhost [127.0.0.1]) by mother.synopsys.com (8.9.1/8.9.1) with ESMTP id GAA24786; Mon, 4 Nov 2002 06:23:31 -0800 (PST) Received: from michaelclap (localhost [127.0.0.1]) by fr02.synopsys.com (8.9.1/8.9.1) with SMTP id PAA28968; Mon, 4 Nov 2002 15:24:21 +0100 (MET) From: "Michael Chapman" To: "Ben Elliston" , "Michael Chapman" Cc: Subject: RE: Disassembly of instruction with 4 bit opcode Date: Mon, 04 Nov 2002 06:24:00 -0000 Message-ID: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit X-Priority: 3 (Normal) X-MSMail-Priority: Normal In-Reply-To: Importance: Normal X-MimeOLE: Produced By Microsoft MimeOLE V5.50.4807.1700 X-SW-Source: 2002-q4/txt/msg00023.txt.bz2 Hi Ben, What worked for me was:- /* Override disassembly hashing - there are variable bits in the top byte of these instructions. */ #define CGEN_DIS_HASH_SIZE 16 #define CGEN_DIS_HASH(buf,value) ((* (unsigned char*) (buf)) & 0x0f) However, presumably it would be more efficient to make this a bit more intelligent and only mask out the rest of the opcode in the case that the 4 LSB bits are 0xc. Regards, Mike Chapman -----Original Message----- From: bje@scooby.brisbane.redhat.com [mailto:bje@scooby.brisbane.redhat.com]On Behalf Of Ben Elliston Sent: Monday, 04 November, 2002 13:33 To: Michael Chapman Cc: cgen@sources.redhat.com Subject: Re: Disassembly of instruction with 4 bit opcode Hi Michael, >>>>> "Michael" == Michael Chapman writes: Michael> The problem is with the "call" instructions which use only Michael> 4 bits of the opcode using the remained for the address. Michael> Everything is strictly little endian with the opcode always Michael> appearing in the least significant 8 bits (or 4 bits in the Michael> case of call) of the instruction. When I dissassemble the Michael> following (listing output from the assembler) [...] Michael> 10: cc 00 *unknown* Investigate using something like this in your .opc file: /* Override disassembly hashing - there are variable bits in the top byte of these instructions. */ #define CGEN_DIS_HASH_SIZE 8 #define CGEN_DIS_HASH(buf,value) (((* (unsigned char*) (buf)) >> 5) % CGEN_DIS_HASH_SIZE) Cheers, Ben