From: Alan Lehotsky <apl@alum.mit.edu>
To: cgen@sources.redhat.com
Cc: apl@alum.mit.edu
Subject: CGEN vs. VLIW architectures...
Date: Wed, 17 Apr 2002 13:12:00 -0000 [thread overview]
Message-ID: <a05111704b8e381193989@[63.214.109.98]> (raw)
With a couple of small patches, I got CGEN to accept the basic
specification of a VLIW
machine with 256 bit instructions. [Of course, at this point, I only
have defined
- TWO instructions (one of them's NOP, and the other is bogus :-)
- ONE operand (CGEN generates bad C code without any operand
definitions.)
Of course, since this is a VLIW machine, there IS only one
instruction, with about 40 subfields.
Is there anyone else working on a VLIW port? Want to coordinate
figuring out what needs
fixing for machines where the instruction is larger than "long long"?
--
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reply other threads:[~2002-04-17 20:12 UTC|newest]
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