Hello,

On Mon, Oct 26, 2009 at 7:12 PM, Doug Evans <dje@sebabeach.org> wrote:
> Dave Korn wrote:
>>
>> Dmitry Eremin-Solenikov wrote:
>>
>>>
>>> Hello,
>>>
>>> I have a question regarding generating sim code from cgen description.
>>>
>>> I have an instruction operand instantiated from field with type h-addr.
>>> If in the semantics part of the instruction I try to access the operandr
>>> as an address: '(mem QI ddaddr)', I get an error from cgen:
>>>
>>> simplify.inc:131:3: op:new-mode: invalid mode for operand `ddaddr': USI
>>>
>>> This is the definition of ddaddr:
>>>
>>> (dif f-dd-1 "1-byte direct address at 1 position" (ABS-ADDR) 8 8 0 8 UINT
>>> #f #f)
>>> (dno ddaddr "direct address" () h-addr f-dd-1)

> What does the instruction definition look like?

Please see the attachment. The stamp-cpu (cgen-cpu-decode) fails on
this CPU file.

-- 
With best wishes
Dmitry