From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 14695 invoked by alias); 24 Feb 2010 14:55:13 -0000 Received: (qmail 14604 invoked by uid 22791); 24 Feb 2010 14:55:10 -0000 X-SWARE-Spam-Status: No, hits=-1.6 required=5.0 tests=AWL,BAYES_00,RCVD_NUMERIC_HELO,SPF_HELO_PASS X-Spam-Check-By: sourceware.org Received: from lo.gmane.org (HELO lo.gmane.org) (80.91.229.12) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 24 Feb 2010 14:55:05 +0000 Received: from list by lo.gmane.org with local (Exim 4.69) (envelope-from ) id 1NkIdi-0000sO-RF for cgen@sources.redhat.com; Wed, 24 Feb 2010 15:55:02 +0100 Received: from 91.213.169.4 ([91.213.169.4]) by main.gmane.org with esmtp (Gmexim 0.1 (Debian)) id 1AlnuQ-0007hv-00 for ; Wed, 24 Feb 2010 15:55:02 +0100 Received: from dbaryshkov by 91.213.169.4 with local (Gmexim 0.1 (Debian)) id 1AlnuQ-0007hv-00 for ; Wed, 24 Feb 2010 15:55:02 +0100 To: cgen@sources.redhat.com From: Dmitry Eremin-Solenikov Subject: Re: cgen -> opcodes problem Date: Wed, 24 Feb 2010 14:55:00 -0000 Message-ID: References: <20091227081006.GA23270@doriath.ww600.siemens.net> <4B39014D.4000203@sebabeach.org> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit User-Agent: Pan/0.133 (House of Butterflies) X-IsSubscribed: yes Mailing-List: contact cgen-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: cgen-owner@sourceware.org X-SW-Source: 2010-q1/txt/msg00015.txt.bz2 Hello all, Trying to continue this topic after a while. Doug Evans wrote: > Dmitry Eremin-Solenikov wrote: >> Hello all, >> >> I'm back to my m68hc08 binutils port done via cgen. Recently I've again >> stumbled upon a problem with instructions, whose base? length != ISA >> base length. >> >> E.g. in the attached stripped test case, the 'ttt' instruction either >> (should be assembled as 0x9E 0xF1) is misencoded as 0xsmth 0x00. Is >> this my fault? Or is this the expected behaviour and I should define >> f-seccode in some other way? >> >> Could you please help me? >> >> >> > Hi. cgen currently doesn't handle instructions with opcode bits beyond > the base insn size very well. I have a sandbox with this fixed, but > it'll be awhile (month or more?) before it all gets checked in. What is the current status of your sandbox? Do you have any patches available? Or any intermediate work? Can I/we do something to help you to clean this up? I'm currently trying to dig into ifmt-mask stuff, but it takes time... > In the meantime, setting base-insn-bitsize to 16 may work. [It *should* > work, but there may be attributes of your port I haven't taken into > account.] Setting base-insn-bitsize to 16 break disassembler: it starts looking for 16-bit masks instead of 8-bit for each and every instruction, and this doesn't seem to work for lsb0 = #f port. -- With best wishes Dmitry